UCC28056: issue with trying to adjust the valley switching delay

Hello.

I reviewed the data sheet and you are correct that selecting Rdg sets the turn on delay from the time the CS/ZCD detects zero current.

You can setup delays TZCDR0 through TZCDR7.  Please note the delay is TZCDRO +deltaTZCDRx.  This will have a minimum time of 170 ns if you chose Rdg0 of 130K.  So if you choose RDg1 you r delay will be 170 ns + 45.5 ns = 215 ns.  Please refer to page 5 and 7 of the data sheet for selecting there resistors.

If they are trying to get a delay of less than 170 ns this will not be possible. If the delay is greater than 170 ns it should be possible to adjust it.

You might want to use the excel design tool to check the setup of there two ZCD/CS filter as well.  You can find the tool at the following link.

Regards,

Hi Mike,

I'm not sure if the waveforms i shared are visible. I attached via word document.

The customer is aware of how to select the resistors. the issue is when they select either extremes (9K vs 160K) there is not a real difference in delay.

in the waveform, you can see it switches when VDS is fairly high (not in the valley).  any idea whats wrong?

additionally, they are using the UCC28056 regular version (not B or C). if they make ZCD cap 22pF, they notice it looks better in terms of valley switching, but the current waveform becomes noisy. if they increase this ZCD cap, the current looks better, but they lose the soft switching they are after.

Valley switching delay waveforms.docx