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TPS546D24A: TPS546D24A waveform issue

Part Number: TPS546D24A

Hi TIer,

Could you help us to explain that waveform issues, thanks!

1. what causes the output voltage to oscillate twice when load current release?

2. what causes it to phase bounce when load current release?

  • Hi,

        Can you please let us know how much of output capacitance you have for the application?  Would it be possible to share the schematic?  If you have concerns sharing the schematic on the forum, you can email me at g-dhanabalan@ti.com with the schematic.

    Regards,

    Gerold

  • Hi

       Can you also give us a zoomed out scope shot showing the load transient?

    Regards,

    Gerold

  •  

    Is this load release occurring during or at the very end of the start-up?

    The Phase node voltage appears to show the low-side FET turning off.  During Soft-Start, the TPS546D24A limits the on-time of the low-side FET to limit the power-stage's ability to sink current to prevent it from discharging a pre-biased output voltage.  That would be the only reason to turn-off the low-side FET a near zero load current.  It looks like the converter is trying to respond to a heavy load release, and the resulting overshoot on the output while the soft-start pre-bias circuitry is still limiting the low-side FET ON-time.

    Negative current protection would also turn the low-side FET OFF, but negative current protection would cause the switching node to rise above the input voltage as the inductor current is forced though the body diode of the high-side FET 

  • Dear Peter,

    Thanks for your response! 

    May I know the negative current happen reason? In general, the converter or controller how to protect it when negative current occuring?

    John

  • Hi John,

       Can you please check if the load is a resistive load during startup or you are doing a load transient during startup which is causing this to happen?

    As Peter described, there are 2 reasons.

    1. Negative current happens because the output voltage overshoots and the converter tries to pull current out of the output to bring it back to regulation.

    2. Vout already has some voltage during startup. So to regulate it, the converter will try to sink (negative) current. But this is not desired, so the LSFET will be turned off to prevent this from happening (called pre-bias startup feature)

    In your case, looks like something is strange with the load which is causing this.

    Regards,

    Gerold

  • Dear Gerold,

    Thank you very much!! and I test another condition to find some issues, also need your help to provide suggestions or analyze.
    when we turn off input source@EE load 26A turn on, the VIN falls to 6V then phase node off, VOUT as fall.
    but I don't know what condition cause VIN bounce then phase node on, VOUT rise till input cap no energy and converter off.

  • Hi,

        I need some answers for clarity.

    1. Did you turn off the Vin with the electronic load drawing 26A of current?

    2. Or did you turn on the electronic load and Vin suddenly dropped?

     Would it be possible to share the schematic?  If you have concerns sharing the schematic on the forum, you can email me at g-dhanabalan@ti.com with the schematic.

    Regards,

    Gerold

  •  

    What you are seeing on the shut-down of the sourcing supply is a VIN recovery that is greater than the UVLO hysteresis.

    As the input voltage decreases, the current draw on the input increases, this creates a larger drop across the parasitic resistance between the source capacitors (output capacitors inside the Power Supply and input capacitors on the board) and the PVIN input voltage on the converter.  When the input voltage drops below the turn-off UVLO and the converter stops switching, that input current drops to zero and the voltage drop across the resistances drops to zero, we observe this as a rise on VIN.  If that rise is greater than the UVLO hysteresis, VIN will rise from the falling UVLO level (VIN OFF) to the rising UVLO level (VIN ON) and the converter will turn back on momentarily.

    With the TPS546D24A, you have a couple of options to adjust the UVLO and UVLO hysteresis.

    If you are using a resistor divider from PVIN to the EN/UVLO pin to program an analog UVLO function, you can adjust the resistor values to change the ON and OFF voltages of the UVLO.  The Hysteresis (VIN ON - VIN OFF) is set by the hysteresis current (5.5uA typical) times the resistance from PVIN to EN/UVLO and the VIN ON threshold voltage is set by the ratio between the resistor from EN/UVLO to PVIN and the resistor from EN/UVLO to PGND (Threshold of 1.05V)

    If you are using PMBus, you can program the PVIN ON and PVIN OFF PMBus values to adjust the turn-on and turn-off hysteresis raising the turn-on or lowering the turn-off voltage.

    If you let me know which one you are using, and what threshold levels you would like to adjust them to, I can help guide you through it.