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UCC27282: High-Side Output Voltage (HO) when both Inputs (LI & HI) low

Part Number: UCC27282

Dear TI-experts,

I have an issue with the gate driver UCC27282 in SOIC-8 package (currently preview). 

The gate driver is connected as follows:

When I set both inputs (HI & LI) to 0V, I expected that the ouputs LO and HO (and therefore HS) would turn to 0V aswell. Unexpectedly, HO and HS turn to about 3.2V (LO to 0V). 
Is this conduct correct?

Kind Regards

Ben

  • Hello Ben,

    This is a fairly common question, and observation when looking at the half bridge gate driver outputs when both inputs are low. I assume the gate driver is driving MOSFETs in the half bridge configuration, and you are applying VDD to the driver with both driver inputs low.

    There is a path from VDD to HB to charge the HS-HS capacitance through the boot diode. The current flowing from VDD to HB will provide current into the HB-HS capacitor, the charging current path is also through HS which is switched close to ground when the low side FET is turned on. If both FETs are off, the switch node, and driver HS pin will have voltage resulting from the current flowing from VDD into the HB-HS capacitor. If HO to HS is low then the HO output is off which is correct regarding the logic.

    If you turn on the low side MOSFET, LI=high, then the HS pin will switch close to ground and the HO voltage should be close to ground also assuming the HI is low.

    Confirm if this addresses your question, or you can post additional questions on this thread.

    Regards,

  • Hello Richard,

    Thank you for your quick response and excellent explanation. 

    One more question: If I were to take the driver in DRC package (which includes the EN pin), would HO and LO be 0V if EN = 0V?

    Kind regards,

    Ben

  • Hello Ben,

    Yes, the enable function when enable is low, sets both driver inputs to the low state regardless of the driver input pin voltage.

    Regards,

  • Thank you a lot, Richard!