Hi Sir,
as below waveform, is the signal of this GATE_pin 13 correct? why not smooth rise? may i learn from you and provide suggestion or idea, thanks.
attached is schematic and GATE waveform.
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Hi Sir,
as below waveform, is the signal of this GATE_pin 13 correct? why not smooth rise? may i learn from you and provide suggestion or idea, thanks.
attached is schematic and GATE waveform.
Hello,
PR22 affects the turn on time of the Gate. You could try increasing this to slow down the gate turn on speed. This could be the gate capacitance of the FET charging.
If this post answers your question, please indicate so by marking this thread as resolved. Thank you.
Regards,
Michael P.
Applications Engineer
Texas Instruments
Hi Michael,
sir, thanks for your reply and help. we will try it.
if this problem will affect the output what risk?
Hello,
The resistor slows down the turn on time for the gate. If it is too slow, it will affect the timing of the DCDC converter. I would recommend a range of 0-100ohm.
If this post answers your question, please indicate so by marking this thread as resolved. Thank you.
Regards,
Michael P.
Applications Engineer
Texas Instruments
Hi Michael,
you mean that too slow gate time will affect the output timing of the dc-dc converter? right?
sorry~let us learn from you, if the time too slow, will affect the gain & phase margin?
thanks for your great help.
I am saying adding a resistor lowers the voltage on the gate of the FET vs the voltage on the GATE pin of the IC - thus it will turn on for a shorter time since there is less time above the Vgs threshold. The IC has a max duty cycle, so if the on time becomes too low it will affect the DCDC performance since the IC cannot adjust the duty cycle as it needs to.
If this post answers your question, please indicate so by marking this thread as resolved. Thank you.
Regards,
Michael P.
Applications Engineer
Texas Instruments
Hi Michael,
got it, thanks for you reply
only effect the max duty cycle and efficiency performance, so it has nothing to do with dynamic phase&gain,right?