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LMR36006: Using LMR36006 buck as negative input to negative output boost

Part Number: LMR36006

Dear TI and to whom it may concern.
I'm trying to simulate the model of the LMR36006 (buck synchronous) you provided on your site in the steady state transient mode on PSpice. With positive voltages, and in normal configuration (as on datasheet) it works fine. I'm trying to use it instead as a boost for negative input to a more negative output voltage, as in the schematic in the attachement. I can't manage to make it work, it seems like the PSPICE model doesn't like "negative ground voltages" for VHDL control and it stops switching, even if the topology seems good. I tried every configuration, with schottky diodes and not. On LTspice the same configuration with similar buck converters works fine, on PSpice TIs one don't. Also normal simulation with just a N-MOS, inductor and diode in the same configuration work fine, the problem is in the converter block.
Can you help me with this? Is it a configuration problem not fitting with the applciation, or am I right about the model doesn't like negative volateges (less than 0V, as it sees only logic 0-1 in the internal logic)?
Or do I have to handle grouds differently? Or the feedback has to be inverted?

Thank you,
I hope you can help me, i'm getting mad about that,
Pier

  • Hello Pier,

    I notice that your VIN and EN pins are tied to ground in the above schematic, this will disable the device.

    Please refer to the application report I have pasted below for more information on the Inverting Buck Boost configuration as this will help in your current use case.

    https://www.ti.com/lit/an/snva856a/snva856a.pdf

    If you continue to have simulation issues, please post a reply to this thread and we will go from there.

    Thank you,

    Harrison Overturf

  • Hello Harrison,

    thank you for your reply.

    Vin and EN are tied to ground as it is the "more positive side". Input voltage is -16V (i don't need a inverting buck as you suggested unfortunately), it is on the right side of the indutor L4.

    If I simulate only passive components and the just the high side N-MOS with bootstrap it  works fine, and I achieve a -40V from a -16V. The problem seems to be the model of LMR36006 or other buck converter models in your site don't like ground as the "more positive" voltage.

    I attach you some references for what i'm taling about.

    Positive Buck Regulator Makes Negative Boost DC_DC Converter _ Analog Devices.pdfPositive Buck Regulator Makes Negative Boost DC_DC Converter _ Texas.pdf

    Thank you for your time,

    Pierpaolo

  • Hi Pierpaolo,

    My apologies for my initial misunderstanding, I thought you were trying to simulate an IBB.

    I'm going to reassign this thread to the PSPICE modelling group to confirm if this is indeed something to do with this buck model not accepting negative input voltages.

    Regards,

    Harrison Overturf

  • Hello Pierpaolo,

    Have you tried modifying the inverting buck boost steady state model for this device?

    It should be located in the same folder that was used to download the non-inverting buck steady state model. This model is configured to output negative voltages so it shouldn't have issues with negative ground voltages or anything like that.

    I'll try modifying this on my end and will get back to you with some simulation results by end of day Nov. 9.

    In the meantime, feel free to try modifying this on your end as well and let me know if this allows you to get -32V output.

    Regards,

    Harrison Overturf

  • Hello Harrison,

    I have just tried, but it seems to behave the same. The IBB in the folder is positive powerd anyway, and that's why I believe is with negative grounds. I paste here the simulation.

    I'm also trying to use a TPS54561QDPRRQ1, which has only the high side N-MOS, therefore requires use of an external diode, but it behaves the same: a fisrst huge negative spike peak, then SW stops switching and output goes to zero with the capacitor's discharging.

    I tried different models by your site, of other buck converter always with N-MOS high side, but always same result. Or I am wrong on somenthing, or negative ground are not appreciated.

    Thank you,

    Pierpaolo

  • Hello Pierpaolo,

    I am also having some issues getting the LMR36006 model to work in this particular application. I am working with the modeling group to get to the bottom of this and will have an update for you by the end of the week. Thank you for your patience as we work to resolve this matter.

    Regards,

    Harrison Overturf

  • Dear Harrison,

    Thank you for your help. I take this opportunity to report the problem with a lot of your buck models on the site (at least all the ones I tried, both syncronous and asynchronous, N-MOS high-side), so maybe if there's a solution you can solve for others too, if it can help you. Anyway I'm sizing In/Out filters in the meanwhile, the open loop architecture is working well, I just needed the closed loop model to verify the control loop stability and BW.

    Thank you again for your help,

    Best regards

    Pierpaolo

  • Hello Pierpaolo,

    Thank you for bringing this issue to our attention, we are actively looking into it and will post a solution to this particular problem on this forum when we have one.

    Regards,

    Harrison Overturf

  • Hello Pierpaolo,

    After working with our modeling team we believe we have found a solution for this particular device however I'll need to simulate it on my end.

    If you share with me what you would like to simulate, I can simulate and share the results in a power point format.

    Regards,

    Harrison Overturf

  • Hello Harrison,

    Thank you for being back that soon. I would like to simulate the steady-state response with 50mA DC load and 100-150 mA AC load in parallel in the 25 kHz BW on a -35 V bus (therefore a 700 Ohm in paralell to a 100-150 mA I_step), "boosting" from a -15 V in input. After that I have to check the voltage regulation (%) and compare it with a LDO in order to decide if I need to use a LDO after to achieve less than 1 mV of ripple on line regulation, and if everything is controllable if I put some output filters and moove the buck feedback after them, slowing down the CL response. I have just GND and -15V in input I can use.

    I hope I didn't explain it too bad.

    Thank you,

    Pierpaolo Granello

  • Hello Pierpaolo,

    Thank you, I think your explanation is very good, just to check here's a summary:

    • Vin= -15V
    • Vout= -36V
    • 700Ohm load in parallel with 100mA to 150mA I_pulse
    • You want <1mV output voltage ripple
    • Insert a second LC output filter with the FB connected at the Load if the 1mV output ripple cannot be achieved 'normally'

    Let me know if the above information looks correct and I can simulate that for you.

    Thanks,

    Harrison Overturf

  • Hello Harrison,

    Yes perfect. Also L4 in figure is 33 uH, ending on Vout with 10uF. Than an output filter of L=10 uH with 4x150uF electrolytic + 10x1uFceramic.

    After the simulation is there a way you tell me how I can do it by myself or how you solved since I need to change something and have other tests?

    Thank you,

    Pierpaolo Granello

  • Hello Pierpaolo,

    Thank you for the additional clarification, that will make things easier.

    We can discuss the solution offline as well as the simulation results, email me here and I will close out this thread:

    h-overturf@ti.com

    Thanks,

    Harrison Overturf