Hello Team,
we have a startup issue where we are missing an explanation.TPS65218D0 is used in standard programmed EEPROM. DCDC is not being used. It was assumed that during startup strict mode is disabled so no OV detection. DCDC3 is set to 1.5V for DDR3. To avoid an open FB signal on DCDC2 the FB pin connected via a 100Ohm resistor to DCDC3 (1,5V). See attached:
In this configuration the PMIC tries to start up, turns on the output rails but shuts down again. it ries to restart after about 1s or so. When connecting the DCDC2 FB DCDC1 following the same default Vout of 1.1V and the same sequence the PMIC turns on. What is the explanation for it. If strict was active during startup it would be an explanation, But if this is not active it is not clear what happens.
Checking the strict mode register it shows strict 0B (strict mode disabled).
What would be explanation for this behavior?
thanks
Lutz