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Part Number: TPS54116-Q1
The TPS54116-Q1 datasheet states that the PMIC may be used to support DDR4 memory if used in conjunction with a separate power supply for the VPP (2.5V) power rail. Could a reference design where the TPS54116-Q1 is used for a DDR4 power solution please be provided?
The datasheet makes no mention of the TPS54116-Q1 compliance with DDR4 power-up, power-down, and RESET initialization sequences (as defined by JEDEC) or compliance with VDD slew rate at power-up initialization sequence (as defined by JEDEC). Can you confirm that the TPS54116-Q1 power rail sequencing complies with the DDR4 JEDEC requirements?
Figure 47 (for reference)
We don't have reference design specific for DDR4, but figure 47 in datasheet provided the part number for VPP. You can also use some similar DC/DC converter for VPP as well.
TPS54116-Q1 has independent Enable pin for VDD/VTT, so user can control the power on/off sequence. It also has programmable soft start time, so it can meet JEDEC power on/off requirement if configured correctly.
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