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TLV700: Inquiry about inrush and load current

Part Number: TLV700

Hello Expert,

I have a question about inrush and load current from enable to 1.8V output.

There is delay time about enable pin because of power on sequence of system.

VCC_1.8V is for interface power of SoC.

I wonder if this product can withstand this condition which is load current 400mA and inrush current during power on of this device.

Maybe I think that it is unstable period.

Can I use our schematic like below?

Is there no problem?

1. Schematic

2. Power On Waveform

3. Power On without R274 (This resistor is for discharging of Vout)

4. Power On with R274 (This resistor is for discharging of Vout)

Best Regards,

Michael

  • Hi Michael,

    The TLV70018's current is internally limited. At values greater than 250mA, the device can enter current limit - where output voltage is not regulated. 

    Internal current limit is better explained in section 7.3.1 Internal Current Limit of the datasheet. 

    Best,

    Juliette

  • Hi Juliette,

    Thanks for your kind feedback.

    As you mentioned, Is there no problem if I use our schematic?

    Could you please give me confirm?

    Best Regards,

    Michael

  • Hi Michael,

    I'm sorry for misinterpreting your question. 

    Is the 1uF capacitor the only COUT being used? If there is more capacitors being connected, we would recommend lowering the value (lower than 40uF) to keep the inrush current low. 

    I checked the bond wire fusion current and it is around 1.2A; because it spikes to this range for such a small amount of time, your device should be fine. The inrush current can become a concern if the inrush current stays higher than that value for a long period of time. 

    Best,

    Juliette