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Part Number: TPS650864
The TPS650864 has multiple default settings options (orderable part numbers) but it is common that they won't be a perfect match for a given design.
What should I do if I don't want to use one of the regulators that is enabled by the OTP sequence in a particular orderable of TPS650864?
If I want to use TPS6508641 but I don't need BUCK3 to supply my DDR - that is handled by a separate chip. What do I do with BUCK3?
Thank you, Kevin LaRosa--------------------------------------------------For more information on Multi-Channel Power Management ICs visit www.ti.com/PMIC
For starters, if the regulator is not enabled by the OTP settings, then follow the TPS65086x Schematic and Layout Checklist for what to do with regulator pin. An example would be TPS6508641's SWA1 as long as CTL2 (SWA1_EN) = GND. Since the PMIC is not trying to turn SWA1 on, the regulator is unused and outputs can be left floating in this example. This can be most easily found using the sequence information in the datasheet. If the regulator is in the sequence, then the PMIC is trying to turn it on and precautions must be taken.
For regulators that the PMIC is trying to turn on, how to handle unused rails depends on whether the power fault is masked or not. This can be found in the OTP Summary section in the datasheet.
For the example, BUCK3 on TPS6508641, the power fault is NOT masked. This is visible in Table 6-12. TPS6508641 Settings Summary—Buck Regulators in the datasheet.
As a result, if FB3 is not supplied with the proper voltage within 10 ms of the regulator being enabled, the PMIC will sense a power fault and shut down.
To avoid a shutdown, FB3 should be supplied with the proper voltage (in this case depending on the state of CTL6, it can be 1.1 V or 1.2 V). The most common way to do this is with a resistor divider from another regulator that is already enabled (in this case, BUCK1 would be a good regulator to use).
One important note: to help to stabilize the FBx pin, a >1nF capacitor should be placed between the FBx pin and GND to stabilize the voltage. There is some parasitic capacitance between the FBx pin and the SWx pin, so this helps to ensure it does not pick up any noise that would cause a power fault.
If the power fault is masked, then the PMIC will not shut down with the wrong voltage on the FB pin, so the default instructions from the checklist are valid.
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