TPS40077: can't output 15V

user5848839 

Your schematic failed to upload, but I believe I know the likely issue.  The TPS40077 controller imposes a maximum duty cycle on the PWM comparator that varies with the KFF current and is linked to the UVLO programming.

The current into the KFF pin is internally mirrored and forced into an internal capacitor to create the modulator ramp in order to realize the voltage-feed forward function.  The ramp is reset every switching cycle.  When the peak of the ramp exceeds 1V during a switching cycle, the TPS40077 exits under voltage lockout (UVLO) and allows the output to enable.  When the ramp exceeds 2V, the TPS40077 automatically terminates the current on-time pulse in order to ensure the modulator operates within its linear range and does not reach the ramp saturation voltage.  This limits the maximum output voltage to approximately 1.8x the UVLO voltage, which while is likely set too low in your application.

If this is the issue, you have a couple of options:

1) The simplest option is to increase the programmable UVLO threshold by increasing Rkff and the resistance from a supplemental Diode, Capacitor, Resistor (DRC) circuit off of LDRV, if used.  This increased resistance will provide less current from KFF and increase the VIN required to achieve the UVLO threshold and increase the maximum duty cycle.

For a 15V output, I would recommend a UVLO_OFF level of at least 10V to ensure sufficient duty-cycle to maintain the output voltage.

The increase in the UVLO voltage will decrease the ramp slope for all VIN voltages, which will increase the modulator gain proportionally, so we should double check the loop stability with the new UVLO voltage.

2) If you need a undervoltage lock-out level less than 10V, it is possible to use a supplimental KFF resistor from LVBP (Rkff_lvbp)to reduce the change in KFF current as VIN increases.  This will suppress the voltage-feed forward gain slightly, so the modulator gain will increase with VIN, so we'll need to make sure the loop-bandwidth does not make the loop unstable due to the added gain.

typically, I would recommend a 50/50 mix of currents from VIN and LVBP. 

A) Using the equation from the TPS40077 datasheet, select RKFF for the desired UVLO voltage.

B) Select Rkff equal to 2x the calculated value.

C) Select Rkff_sup equal from LVBP to KFF that provides current equal to the new RKFF resistor when VIN = UVLO_on

Rkff_lvbp = Rkff_new x (Vlvbp - Vkff) / (Vin_uvlo_on - Vkff)

WIth the KFF resistor from VIN 2x larger, VIN can be 3x higher before it begins imposing a maximum duty-cycle.

3) If your application can accept the fixed UVLO, you can remove the KFF resistor from VIN entirely and replace it with a resistor from LVBP. Calculate Rkff_lvbp using the standard Rkff calculations, but select a UVLO_ON voltage of 3.9V (minimum LVBP voltage) to provide the required ramp current.

You can use the excel compensation calculator tool -  to help check the compensation stability after you have made the changes.

For option 1, the compensation tool will correctly calculate the loop.

For option 2, use the compensation tool with the real VIN to KFF resistor value used to double check the loop.  This will have more gain than the circuit actually provides, but that will add some safety margin.

For option 3, calculate the RKFF value that would provide a UVLO value equal to the full output voltage, and select that Rkff value in the design tool so it will correctly calculate the modulator gain with the KFF resistor from LVBP.