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LM43601: Disable PFM in LM43601

Part Number: LM43601
Other Parts Discussed in Thread: LM43603,

Is there a way to either disable PFM or limit the behavior?
I have an unusual application where it is not desirable to drop down to the longer  pulse at a low frequency.  I need to maintain continuous current.

The data sheet says In PFM operation, a small, positive DC offset is required at the output voltage to activate the PFM detector.  However, this is not defined.
I would like to be able to design to avoid this offset.

Can you provide a bit more detail?

Thanks

Glen

  • Hi

    it looks no FPWM operation for LM43601, you can choose LM43603 if you need higher continuous current.

    if you want to avoid the offset, you need to have dummy load to avoid it come into PFM mode. another way is you can choose LM63625 which can used as FPWM with 2.5A continous output current. but both no P2P devcie. 

    Thanks

  • Hello

    Thank you for the information.  I wish I had used the LM636x5 but I have a design already with the LM43601.
    Part of why I chose the LM43601 was to get down to 200KHZ.  Looks like the LM636x5 can get close to that.

    However, I need to also try a patch on my existing hardware.  A static (resistitve) load would not be easy do do, because I would suffer that loss at higher currents and I only care about efficiency at full current.
    I have noticed that I can effect the PFM operation by putting a small capacitor in series with a resistor across the inductor.  This would be reasonable for me to do and it appears to not affect my efficiency much.
    Any insight would be helpful.

    Also based on this statement in the data sheet page 16:

    In PFM operation, a small, positive DC offset is required at the output voltage to activate the PFM detector. The
    lower the frequency in PFM, the more DC offset is needed at VOUT. See Typical Characteristics for typical DC
    offset at very light load. 


    Please tell me what the DC offset range is.  The data sheet does not say.  I am sure it is not well controlled, but is is like 1 mv, 10, 20 30mv?  100mV?
    The high tolerance on the FB is 25mV (max at 125C) so I have to assume the PFM threshold is at least another 25mV away.
    I would really appreciate if you can give me a rough idea.  To patch my design, it would not be all that hard to prevent going higher into the range of the PFM trigger voltage.
    Please provide the range above max FB where PFM is supposed to engage.

    Thanks

    Glen

  • Hello Glen,

    In addition, you could size inductor to have a fairly high amount of ripple to avoid PFM, as PFM mode is often triggered by absolute level on peak inductor current. PFM mode is typical around 20-30% of max load current. You would need to ensure min load + half inductor ripple is greater than that value.

    Furthermore, it looks like we guarantee FB voltage. You can view min and max limit. That by the voltage divider variance would be your variance on vout in steady state operation.

    Figure 7 and Figure 10 speak to variance as well.

  • Hello,
    Please understand my request...I can read the data sheet; I know what the feedback range is. That was not my question.

    With regards to PFM, the data sheet says this:

    In PFM operation, a small, positive DC offset is required at the output voltage to activate the PFM detector. The
    lower the frequency in PFM, the more DC offset is needed at VOUT. See Typical Characteristics for typical DC
    offset at very light load. 

    Please provide the voltage range above max FB where PFM is supposed to engage.

    BTW, the inductor is fixed at a very high value because it actually is a proportional solenoid coil.  The inductance is 0.04H (yes, 40mH)
    This is NOT a cookbook design.  I am a very experienced designer, so I have unusual questions.
    I have integrated this into a valve controller where inductor current controls the valve.  Essentially I set up the feedback loop to control voltage across a constant load (shunt) It works very well...except when PFM mode jumps in at lower currents.
    You do not have another solution that works better (no solenoid PWM controller in your portfolio actually controls current for a proportional valve)
    Please accept that and move on.

    So again..the data sheet says..

    In PFM operation, a small, positive DC offset is required at the output voltage to activate the PFM detector. The
    lower the frequency in PFM, the more DC offset is needed at VOUT. See Typical Characteristics for typical DC
    offset at very light load. 

    All I am asking for is to know what range that offset might be.

    Sorry to be a bit abrupt about this, but one huge frustration I have with this forum is when you have a high level question, I usually have to ask several times to get past the "brush off" answers...or answers that just quote the data sheet.

    Best regards,

    Glen

  • Hello Glen,

    I would say 75% of questions tend to be datasheet answers, hence, the approach may often be the team pointing to the datasheet. Hopefully I can help change your view.

    In regards to PFM detection FB offset needed,

    I would like to say that could be reflected in the load regulation curve were you can see the "offset" on vout from the nominal 5 Vout.

    Knowing the feedback divider gain (.2), we can then determine the FB offset needed.

    I am going to go ahead and confirm with the lead designer of the IC.

    If you may, please contact me at my email. I would like to finish communication over personal email as we may begin to share information which may not be suitable for public forum.

    I will now close this thread.

    email: m-beck1@ti.com