Other Parts Discussed in Thread: TPS54561EVM-555, TPS54561
Hi
We want to use TPS54561-Q1 in a design where the nominal input voltage is 24 -28.5 and the output is 12V
To verify the design I have modified a TPS54561EVM-555 to output 12V. Our design looks like the attached shematic and the TPS54561EVM-555 is modified to match it.
The system where the TPS54561 is used need to pass some pretty hard cranking tests which means the regulator input can go down to 8 V.
When I tested to lower the input voltage to the modified evel board (loaded with 1.75A), it started to behave strange when the input voltage droped below 12.5V (buzzing noise from the circuit and increased output noise by 300 - 400 mV). This behaviour is quite as expected (except the buzzing noise) when reading about low dropout behavoiur and 100 % duty cycle in the datasheet when the gate driver needs to recharge tp keep the FET open.
But when the input voltage drops below 8.5V the circuit starts "ticking" (the buzzing sound is still there) and the output voltage has 5V drops with a repetition rate of 10Hz.
What can I expect from the TPS54561 when I drop the input voltage below the regulated output voltage? Can my identified behaviour be explained?
Is there any way to make the output voltage just follow the input voltage (with som drop) in this condition?
Regards
/Johan