In the block diagram of the subject device, there is a "VREF GOOD" logic block shown that connects to the inverting input of a 3-OR gate. What are the rising and falling thresholds of this VREF Good block (monitoring VREF)
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In the block diagram of the subject device, there is a "VREF GOOD" logic block shown that connects to the inverting input of a 3-OR gate. What are the rising and falling thresholds of this VREF Good block (monitoring VREF)
Hey Steve,
I don't have much information on the thresholds but will try to look into it.
Is there a specific reason this information is needed?
Thanks,
Daniel
Hey Steve,
I looked into it with the designer and our best estimate is around 4.45 V for the turn on threshold.
Note this is not something that is tested in production and thus I can't guarantee a min/max spec.
Thanks,
Daniel