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BQ76930EVM: How does BQ76930EVM connection with BQ76200EVM for protection testing ?

Chih wei Huang
Prodigy 50 points
Part Number: BQ76930EVM
Other Parts Discussed in Thread: BQSTUDIO, BQ78350-R1, BQ76930

Hi All :

I have the problems for using BQ76930EVM and please help me to resolve it , thanks.

1. I  set the command 0x0011 to ManufactureAccess() by bqstudio softwrae  and the discharge current  is small than Power : Sleep Current  setting.

     But the SLEEPM Bit  not to set and sleep mode doesn't activate successfully , coluld you have any advice for it ?

2, I want to use BQ76930EVM with BQ76200EVM for protection testing , do you have any document or description for BOQ76930EVM connection with BQ76200EVM (Ex: how to bypass Low side MOSFET 

    in bq76930EVM )? 

    In addition,  I do the over voltage protection test by using  BOQ76930EVM with BQ76200EVM  and  the COV bit of BQ78350-R1 is trigger , but connector side still has voltage output .

    It seems AFE not protection and do you have any advice  it ?

   

  

  • 0
    TI__Guru 54715 points

    Hi Chih,

    1. See the BQ78350-R1 technical reference manual section 8.3.3 "In System Sleep Mode.  There is a setting which is required.j

    2. I do not know of a special document.  See the BQ76930EVM user guide http://www.ti.com/lit/slvu925  for the schematic and layout information on the board.  See the BQ76200EVM user guide http://www.ti.com/lit/slvu926 for schematic and layout information on the board.  In general:

    • The BQ76930 EVM has exposed pads for addiitonal FETs.  You can short from source of Q1 to the source of Q3.
    • J13 of the BQ76930EVM matches the pin sequence of J7 or J8 on the BQ76200EVM
      • Populate components to connect signals to J13 of the BQ76930EVM
      • Remove the shunts from J7 of the BQ76200EVM
      • Connect a cable from J13 of BQ76930EVM to J7 or J8 of the BQ76200EVM as is most appropriate
      • Remove the GND shunt on BQ76200EVM J3.
    • Connect the PACK- terminal of the BQ76930EVM to the BATSR- terminal of BQ76200EVM
    • Connect the PACK+ terminal of the BQ76930EVM to the BATT+ terminal of BQ76200EVM
    • Apply power and test operation

    3. When in OV the BQ76930 pulls CHG low with 1M ohm internal resistance.  This will pull PACK- down through the gate connection network most significantly R8 (1M) and D3 (shorting 1M R9).  See Figure 29 of the BQ76930EVM user guide.  When measuring the pack voltage with a meter, the meter will typically have 10M ohm input resistance pulling up on the PACK-.  Ignoring the diode drops of Q5 and D3 you will commonly see about 2/12 of the normal pack voltage.

  • 0 in reply to WM5295
    Prodigy 50 points

    Hi All :

    Please refer the feedback as below and please help to advice it ,thanks.

    1. See the BQ78350-R1 technical reference manual section 8.3.3 "In System Sleep Mode.  There is a setting which is required.

    → I refer the section 8.3.3 and set gauge  parameter as below , It doesn't into sleep mode when I monitor prower consumption by meter.

        DA Configuration [IN_SYSTEM_SLEEP] = 1,  [SLEEP] = 1 .

        Power : Sleep current  = 20mA , Bus timeout  = 5S , Voltage time - 5S, Current time 20S .

       OperationStatus()[PRES] = 1.

      In addition , If I remove the cable of connection EV2300 tool and power consumption will decrease , Is it correct for into sleep mode ?

    2. I  do some modify as below and please help to confirm it is ok for testing.

    • The BQ76930 EVM has exposed pads for addiitonal FETs.  You can short from source of Q1 to the source of Q3.

              → I remove the component R6 and R7 in bq76930EVM.

    • J13 of the BQ76930EVMmatches the pin sequence of J7 or J8 on the BQ76200EVM
      • Populate components to connect signals to J13 of the BQ76930EVM

                → I mount the component R80/R81/R84/R88/R93/R98/R99/R113  in bq76930EVM.

      • Remove the shunts from J7 of the BQ76200EVM

                → Remove it.

      • Connect a cable from J13 of BQ76930EVM to J7 or J8 of the BQ76200EVM as is most appropriate

                →  BQ76930EVM  EDSG pin to link BQ76200EVM DSG Pin

                      BQ76930EVM  ECHG pin to link BQ76200EVM CHG Pin 

                      BQ76930EVM  EPCHG pin to link BQ76200EVM PCHG Pin 

                      BQ76930EVM  EPM pin to link BQ76200EVM PMON Pin

                     BQ76930EVM  EVEN pin to link BQ76200EVM CPEN Pin

                     BQ76930EVM  EVAUX pin to link BQ76200EVM DIVP Pin

      • Remove the GND shunt on BQ76200EVM J3.

                            → Remove it.

    • Connect the PACK- terminal of the BQ76930EVM to the BATSR- terminal of BQ76200EVM

                  → YES.

    • Connect the PACK+ terminal of the BQ76930EVM to the BATT+ terminal of BQ76200EVM

                  → YES

    3. When in OV the BQ76930 pulls CHG low with 1M ohm internal resistance.  This will pull PACK- down through the gate connection network most significantly R8 (1M) and D3 (shorting 1M R9).  See Figure 29 of the BQ76930EVM user guide.  When measuring the pack voltage with a meter, the meter will typically have 10M ohm input resistance pulling up on the PACK-.  Ignoring the diode drops of Q5 and D3 you will commonly see about 2/12 of the normal pack voltage.

    → I use the BQ76930EVM to link BQ76200EVM for testing ,  the meter will monitor pack voltage by Pack+ (J5) and Pack- (J2) of BQ76200EVM.

        I confirm the COV bit be set in bqstudio , but Pack +and Pack- still has pack voltage output (about 37V , battery is 10S1P).

       I  use the FET_EN button of bqstudio to check pack voltage output , the pack voltage output can be control by FET_EN button.  

       Does it mean the AFE IC (Bq76930) not to trigger for protection ?  How do I do the over protection voltage test that pack voltage will output 0V ?  

  • 0 in reply to Chih wei Huang
    TI__Guru 54715 points

    Hi Chih,

    1. It sounds like the part is not going to sleep unless you remove the cable where you see the power drop.  After setting the IN_SYSTEM_SLEEP bit you may have to reset the part.  Some settings are immediate, some take a reset.

    2. The description sounds correct other than I did not see the shorting of the BQ76930EVM FETs.  Shorting the sources of Q1 and Q3 is one way, or pick convenient points of your choice.  If you have other users in your lab you might make it obvious that the board is modified.

    3. I described the condition of the PACK output and voltage measurement with both FETs off, sorry for the confusion.  When the pack goes to OV, the gauge will only turn off CHG, DSG remains on, so the pack voltage is only the body diode of the charge FET less than normal.  For example if you are at 41V on the battery with 1 or more cells over voltage, CHG will be off and the charge FET will be a diode.  The PACK voltage may measure about 40.4V, the voltage will vary with the load.  When using the BQ78350-R1 it has a body diode protection, if your start discharging it will turn the charge FET back on even though there is an OV fault so that the charge FET does not heat from the current.  The description of the 10M meter resistance and voltage is a common question, you might observe it with an over temperature or similar fault which turns off both FETs, or by toggling the FET_EN command.