TPS65910: PWRON timing

Franz Schellhase

Part Number: TPS65910

Hi team,

Can you have a look into the following customer question about PWRON timing?

The TPS65910 is the main PMIC on a single board computer that we use in our system.

I was looking into the timing of the NRESPWRON output. We are characterizing the functional performance of our system and what we’re seeing from the board doesn’t match what I see in the TPS65910 datasheet and app notes, if I’m interpreting the timing correctly. It looks to me like the time from 5V power applied to the PWRON signal should be about 15ms, and we’re seeing closer to 30ms. The single board computer has the chip configured for boot mode of ‘10’.

If you could provide any insight into the timing of that signal, it would be appreciated.

Thank you,

Franz

over 3 years ago

0 Layne J over 3 years ago

TI__Genius 12735 points

Hi Franz,

I have assigned this post to the expert for this device. Given that it is in the afternoon please accept a potential delay until tomorrow for a response.

Best regards,

Layne J

0 Brian Berner over 3 years ago

TI__Mastermind 30260 points

Franz,

What processor is the TPS65910 being used to power?

If you refer to the TPS65910Ax User's Guide for AM335x Processors, for example, you will see the timing diagrams that are associated with the power-up sequence for AM335x processors.

When BOOT1 = High & BOOT0 = Low, the default settings are loaded from EEPROM programming defined by the respective User's Guide
When BOOT1 = Low & BOOT0 = Low or BOOT1 = Low & BOOT0 = High, the default settings are loaded from OTP and follow the TPS65910 datasheet

0 Franz Schellhase over 3 years ago in reply to Brian Berner

TI__Expert 3605 points

Brian,

The module is Phytec phyCORE-AM335x The processor is AM3359ZCZ

I've seen the user guide, however, I’m not very familiar with the TPS65910 or the AM335. From the timing diagram and table, I interpreted the PORZ timing to be 8 slots at 2ms/slot which would be 16ms. We are seeing timing almost double that. Am I missing a setting that would explain the difference?

Best regards,

Franz

0 Phil Yi40 over 3 years ago in reply to Franz Schellhase

TI__Mastermind 33260 points

Hi, Franz,

Does your "almost double of 16mS" happen to all your boards or some of them?

Did you measure the time from PWRHOLD to PORZ?

Does every rail output normal voltage?

Can you share us schematics and some scope captures?

0 Franz Schellhase over 3 years ago in reply to Phil Yi40

TI__Expert 3605 points

Hi Phil,

I cannot share the schematic, as it is property of Phytec. Since I am working from home now, I don’ t have scope captures either.

I can say that PWRHOLD is tied directly to 5V_in and we are measuring from 5V_in to PORZ.

This measurement is consistently 28-32ms.

Because the SBC is just a component in our design, we are just looking at the inputs/output of the board. The PORZ is the only signal directly from the PMIC that we are looking at. If I were able to go into the lab, I could look at some other signals.

Best regards,

Franz