Hi Team,
One quick question.
What is the status of the PG output when EN is set to low (device disable condition)?
Regards,
Takashi Onawa
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Hi Team,
One quick question.
What is the status of the PG output when EN is set to low (device disable condition)?
Regards,
Takashi Onawa
Hi Onawa-san,
What's your concern with the PG pin? For the PG function, it needs the same internal reference for it to function, when the device is disabled, the PG pin will not functioning.
Regards,
Jason Song
Hi Jason-san,
Thanks for your prompt response on this.
I'm understanding the PG will not function under disabled condition. So Could you tell me the PG output will show low or high (Open drain FET will also disable) in the condition?
Regards,
Takashi Onawa
Hi Jason-san,
I'm sorry. I was a little sleepy.
You mean the PG function will not work so it should never go high in the condition, right?
Regards,
Takashi Onawa
Hi Onawa-san,
I don't think it will go high when the LDO is disabled with a Vin higher than UVLO. But let me confirm this with the design team, please allow 1-2 business days for me to get back to you.
Regards,
Jason Song
Hi Onawa-san,
I just confirmed with the design team, when the Vin is higher than UVLO, with a EN=low, the PG will be low as well.
Regards,
Jason Song