TPS7A24: IQ not modeled?

Hi Antenna_Head, 

Most of the LDOs do not have the Quiescent current into the PSPICE model. The limitation could come from the PSPICE design structure of the LDO we have been using. I will take your feedback to team and try to see if we could have Quiescent current in our future low-power part. 

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* Model Usage Notes:
*
* 1. The following features have been modeled
* a. Start-up behaviour is modeled
* b. Line transients
* c. Load transients
* d. Current Limit is modeled
* e. PSRR is modeled only till 1st pole and 1st Zero (Model limitation)
* 2. Quiescent current, noise characteristics and temperature effects are not modeled
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Regards, 
Jason Song

Thanks for the note;

Not having Iq modelied makes it more difficult to simulate a circuits total Iq.  Obviously the LDO is there to power other circuits; when used with ultra low power op-amps and comparators (like TLV703x, TLV704x) we need to simulate total current draw from perhaps a battery or other energy limited source.  I imagine foro the first order approximation, it is a rather straight forward feature to add.

Thanks agian, -Steve

In case you're interested, this is the full circuit of my simulation.  The TPS7A24 is used to create a 1 uA bias that drives the PMOS source follower (T4) effectively creating an ultra-low Iq NEGATIVE regulator operating from the input rail.  The voltage source D_CELL can go up to 18V, so this is enables using low voltage devices on high voltage rails.

Hi Steven, 

Thanks for your feedback. I totally agree that it's important for us to have the current portion modelled especially to the low power devices. I have just checked the datasheet, even our new Nano-power TPS7A02 does not have the current modelled. I will pass this feedback to the team and see if we can have this in the future. Let me also look into this and try to see if there is a quick fix that can add the first-order approximation. 

Thanks for schematic, did you find this circuit to implement ultra-low Iq NEGATIVE regulator from an app note? If not, I would definitely consider having an app note to explains this circuit. We haven't released any newer negative LDO in the past few years, and this implementation will definitely be helpful for a lot of customers. 

Regards, 
Jason Song

This circuit is my original work.  I was hoping to find an integrated low Iq negative regulator but as you know, TI doesn't make anything suitable. If you think this would be a useful app note, I can work on writing one.

I have no requirements for accuracy on the negative bias, so the source follower and the variation due to Vth was not a problem.

I've attached the TINA simulation for this ultra-low Iq ideal diode circuit.  You can run both DC bias and transient simulations.

-Steve

Ideal_diode_revised.TSC

Hi Steve, 

I appreciate you sharing the schematic. Please allow some time for me to review the schematic. What's the target application for this type of circuit? 

Regards, 
Jason Song