Hi -
Our board design has 5 distinct voltage rails feeding our SoC:
- 3.3V
- 1.8V
- 1.8V Always ON
- 0.8V
- 0.65V
The 1.8V_AlwaysON TLV62084A PG signal feeds the EN pin of the 3.3V TLV62084A and this 3.3V supply feeds the rest if the EN pins (1.8V, 0.8V, and 0.65V) in order to set the power-on sequence.
Our SoC has a 1.8V-level "Power Good" input.
Is it acceptable to connect all of the PG signals from the 3.3V, 1.8V, 0.8V, and 0.65V together with a common pull-up resistor to 1.8V AON?
The intent is that any one of these 4 supplies could pull Power Good low if its voltage fell below the regulation limits.
Since theTLV62084A PG signal can sink 1 mA, are there any particular pointers as to the value of the common pull-up resistor?
Are there any particular concerns about filtering given that 4 different supplies have the PG signal tied to one node?
Thanks very much,
Tom
