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LMG1210: Are gate resistors needed?

Jamie Shaffer1
Prodigy 220 points
Part Number: LMG1210

I’m trying to come up with a metric on how much current will be consumed by the LMG1210 during operation so that I can size my power supplies appropriately. The device has a max sink current of 3A (under the condition of 5V at the gate pin, which does not make sense to me; I would think that it is sourcing current then?) and a max source current of 1.5A. My switch has an internal gate resistance of just 0.6 Ohms, equating to 8A at a 5V gate bias. The app notes do not include any gate resistors, nor does the EVB. Would you recommend gate resistors to limit the current to 1.5/3A, or can I connect it directly to the switch?

  • 0
    TI__Genius 9301 points

    Hi Jamie,

    Thank you for your question. I'm looking into this and will get back to you tomorrow.

    Best regards,

    Leslie

  • 0 in reply to Leslie Marquez
    TI__Genius 9301 points

    Hi Jamie, 

    To clarify the test conditions in the datasheet for peak sink current and peak source current:

    The "VLO, VHO=5V" test condition for "Peak Sink Current" is the initial state of the output: the peak sink current is measured when the driver's output voltage goes from 5V to 0V (to turn OFF the external FET). Similarly, The "VLO, VHO=0V" test condition for the "Peak Source Current" is the initial state of the output: the peak source current is measured when the driver's output voltage goes from 0V to 5V (to turn ON the external FET). 

    We do recommend to include external gate resistor even if it is a 0 ohm resistor as a placeholder.

    The actual peak current required at the gate depends on the total gate charge (which you can find in the datasheet of the transistor you want to drive) and the desired rise time and fall time for your application. Knowing the desired rise time, fall time, and total gate charge for your application, you can estimate the peak current required at the gate:

    • Ipk,src = dQ/dt    (where dt = rise time at the gate)
    • Ipk,snk = dQ/dt    (where dt = fall time at the gate)

    Once you calculate these source/sink peak currents, you can then compare it to the specified current of the driver and also determine the maximum gate resistance allowed to achieve the desired rise/fall times (which will include both the external gate resistance and the transistor's internal gate resistance) from Rgs,max=VDD/Ipk

    Best regards,

    Leslie