• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 233 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65916: How to work POWERHOLD

Koyo Asaishi
Intellectual 1710 points
Part Number: TPS65916

Hi team,

Related to the E2E thread, customer want to activate ACT2OFF mode when POWERHOLD is Low under POWERHOLD mode because it is not worked yet.

https://e2e.ti.com/support/power-management/f/power-management-forum/950789/tps65916-powerhold-doesn-t-work

They think POWERHOLD is set by OTP and it will keep working as POWERHOLD mode when AUTODEVON is 0h (feature is inactivate), correct?

If not, could you advice how to work?

Best regards,
Koyo

  • 0
    TI__Mastermind 24710 points

    Hello, these 2 statements in datasheet explains the priority in going to OFF state.

    (5) The DEV_ON event has a lower priority than other ON events, meaning that DEV_ON forces the device to go to the OFF state only if no other ON conditions keep the device active (POWERHOLD).

    (6) The POWERHOLD event has a lower priority than other ON events, meaning that POWERHOLD forces the device to go to the OFF state only if no other ON conditions keep the device active (DEV_ON).

    Thant means POWERHOLD transitions the device to OFF state when DEV_ON is set to 0.

    Regards 

  • 0 in reply to Mahmoud Harmouch
    Prodigy 90 points

    Hi,team

    Let me continue to ask questions.

    The initial value of DEV_ON of DEV_CTRL Register (Address = 1A0h) is 1h. Does this mean that if you set this to 0h, you will be in POWERHOLD mode?

    Best regards,

    T.KASE

  • 0 in reply to user4936588
    TI__Genius 17380 points

    Hello,

    You are correct that for both released variants of TPS65916, AUTODEVON is disabled so DEV_ON bit should not be set by PMIC and POWERHOLD going low should start ACT2OFF assuming there are no other power on requests. Have they been able to read the registers for the interrupts?

  • 0 in reply to Kevin LaRosa
    Prodigy 90 points

    Hi,team

    In POWERHOLD mode, if the POWERHOLD pin becomes Low, it will be an OFF request, so isn't it shifting to ACT2OFF?

    We want to create a POWER HOLD mode state.

    What should I do from the OTP initial settings to enter POWER HOLD mode?
    We do not understand the relationship between reading interrupt registers and POWERHOLD mode.
    The DEV_ON of DEV_CTRL Register (Address = 1A0h) after RESET is described in the Register Map when it reaches 1h.
    Is it necessary to set it to 0h? Isn't it possible to enter POWER HOLD mode at 1h?
    If AUTODEVON is disabled, does it mean that the value of DEV_ON is irrelevant?

    Best regards,

    T.KASE

  • 0 in reply to user4936588
    TI__Genius 17380 points

    Hello,

    When using POWERHOLD as the main PMIC control, OFF2ACT and ACT2OFF can be utilized to enable/disable the PMIC as long as there are no gating conditions.

    For example, OFF2ACT will not occur with rising edge of POWERHOLD if any of the triggers from Table 5-2. ON Requests Gating Conditions is active.

    Similarly, ACT2OFF will not occur if there are any triggers from Table 5-1. ON Requests which would keep the PMIC ON. This includes all triggers in Table 5-12. Interrupt Sources that are listed as ON REQUEST = Always or [Yes (if INT not masked) & INT not masked in the relevant User's Guide for the specific part number]

    Note that neither "POWERHOLD Mode" or "AUTODEVON Mode" examples in the datasheet really apply here. This use is a 3rd option where POWERHOLD is both the switch-on event and switch-off event. If you want to see it in action, you can order the EVM: https://www.ti.com/tool/TPS65916EVM 

    Thank you for highlighting that the Register Map shows DEV_ON = 1h by default - I do not believe this is accurate. I believe this bit depends on the AUTODEVON bit and that because AUTODEVON is disabled for these OTP spins, the default state of DEV_ON is expected to be oh. If it is 1h, I would expect that it is software setting this bit. Can you provide the register dump for the system when PMIC is not disabling when POWERHOLD goes low? Reviewing this should help identify if there are gating conditions.