LM3409HV: Different outputs signals in a 4 channel circuit (II)

Hello Gonzalo,

First I'm going to list my previous answer then I try and ask more questions:

"Hello Gonzalo,

What are you connecting to the outputs of the circuits for the load?  Are they all the same?  Is there any capacitance across the load?

Do you have a current probe to see what the load current looks like?  These are current regulators so the output voltage will be whatever the load lets it be.  If it is a little low and the current is correct then it is operating correct.  sal1 looks like a square wave, sal2 looks like it is charging and discharging a capacitor, it can look this way if the current is very low.  sal3 and sal4 have very low output voltage.  The output voltage needs to be high enough for the off-timer to work.  If it doesn't get above 1.243 volts it will go into maximum off-time.  Also look at the input voltage when this happens to make sure it is stable. 

Best Regards,"

New questions:

What is your current sense resistor value, I cannot read it on your schematic?  Is it 0.091 ohms?  If so I get about 2.7A peak and 2.6A average switching at 600 KHz.

You may want to change the volts/division to get more resolution.  If UVLO is 1.3V it should be on or close to it since UVLO threshold is 1.243V.

If you can zoom into the Coff voltage you can see if it is reaching 1.243V and if it's switching when the output is high.  Again I would change the volts/division for more resolution.

It looks like the first picture is running in maximum off-time mode.  There is a little spike on the output voltage at about 300 us and then the output rises 300 us after that (appears to be two maximum off-times).  Is there any capacitance across the LEDs?  Is there any resistance across the load?  Is the load actually the leds or is there some other load?  What does the output connection look like?  Have you powered the LEDs with a lab supply to see what the voltage across them is?

Zooming in to the spike along with Coff can show if you are getting a full on pulse.

Best Regards,

Hi Irwin:

I will try to anser your questions.

No I do not have a current probe at the moment, at least can not get it easily

The Leds String has no Resistance, no capacitance. I am connecting 2 string in parallel, each string has 2 leds. Nothing in beteen

The Rsns is 0.91, correct

Regarding the UVLO voltaje:  this is what the UVLO shape looks like. zooming more than before I found 760mv when EN1 is off, 1.64 when is ON

Regarding the Coff Pulse: It is 0V (noisy) when EN1 is off. When EN is turned on, the voltage of Coff is 728 mV, that are decreasing auntil a moment where  a "Spike" of 1.34V is reached, don't know the reason 

Regards

Hello Gonzalo,

Thank you for the information, UVLO seems to be the correct levels.

Can you look at VCC over this same time?  Can you also look at the gate waveform, Pin6 and also the switch node (the inductor connection tied to the mosfet and diode, left side of the inductor on your schematic)?

If is no output capacitance then what may be happening is a leading edge blanking problem.  You will have to zoom in to see how wide the Gate/switching node pulses are.

Best Regards,

Hi IRwin:

Sure:

VCC look almost flat at 12 V, except there is some noisy peaks in the moment of the "final peak" inside each pulse (Yellow Line SAL1, blue line VCC)

Pin 6 looks like this: (Yellow Line SAL1, blue line PIn6

In the first part of the pulse, Pin 6 is about 780mV

I have basically no Gate pulses during the first part of the pulse. In the second part of the pulse, I have 4.8 us ON, 1 us OFF 

Last question. The switch node looks exactly as Pin 6

Hello Gonzalo,

This can be confusing since this is a P-FET driver.  When off the MOSFET gate should be at Vin, 12V in this case (switch node should be near a diode drop below zero volts if there is inductor current).  When on it should be approximately 6V, VCC voltage (switch node should be 12V).

The first picture should look be approximately 6V if Vin is 12V, make sure you are looking at pin 9.

The second picture the gate drive, pin 6 should be at 12V going to 6V when it is on (scope referenced to gnd).

The third picture doesn't appear to be the gate waveform, pin 6.  you can look at the gate of the MOSFET if that is easier.

The fourth picture shows the LM3409 running after a couple of maximum off-time pulses.  Normally this happens with output capacitance that cannot charge Coff to 1.243V, it appears there are leading edge peak current trip pulses when it is running (the narrow  pulses when it is on).

The sixth picture, Pin 6, the gate, should not look like the switch node, it should get pulled from 12V to 6V when turning on and go back to 12V when off.

The MOSFET doesn't appear to have too large of a Qgate for false current trip, perhaps the layout is causing issues with the current sense.  How many layers is the PCB you are using?  If you can set the time base to 100 ns and trigger on the first switch node pulse you will probably see a very narrow pulse of 115 ns (typical).

Best Regards,

Sorry, 

I chose Vin instead Vcc and switch node instead gate pulses. these are the graphs:

VCC(you were right, 6 V)

Pin 6, with detail in the pulses. (From 6 V to 12V) . As it has been noticed, there is a big time lapse  (600us) where I basicaly don have this gate pulses during EN1 =ON

The pulse time detail. From 5 us (ON) tu 1 us(OF) aprox

Hello Gonzalo,

Vcc looks good.  If you look at the second picture (blue trace) you can see a very narrow pulse, if you zoom in on that I would suspect it is approximately 115 ns.  There will be another on 300 us later.  At 600 us the LM3409 appears to start running.  The maximum off-time is 300 us.  This happens if Coff does not reach 1.243 volts.  It cannot reach 1.243 volts if the output voltage did not rise (common with large output capacitors) but can also be caused by a minimum on-time pulse since not much energy goes to the output.

On your last two pictures you can see the first two on pulses, which is good.  The next two attempts appear to be minimum on-times.  This can be caused by the MOSFET Qgate being too high.  This one is under 30 nC so it should be okay.  Next would be layout.  Is this circuit on a one layer PCB? two layer Printed circuit board or is this a breadboard/proto-type?  If there is inductance in the current sense path it could be false tripping the peak current sense comparitor.

You can, as an experiment, place a 50K (49.9K is 1% value) from Coff to Vin if Vin is a stable 12V.  This will allow Coff to charge to 1.243V.  The real fix is to figure out why it's only providing a minimum on-time, first step with that is to see how wide the on-pulse is at the beginning (600 us before it is running).  I think that's where your trigger point is set (near the second division on the left).

Best Regards,

Hi Irwin

The pulse width is aprox 330 ns, not 115. Does it help you?

You are righg, Coff does not reach 1.243 during the pulse, at least until the end of the EN signal(this trace was noticed before): It is 0V (noisy) when EN1 is off. When EN is turned on, the voltage of Coff is 728 mV, that are decreasing auntil a moment where  a "Spike" of 1.34V is reached, 

The layout: it is a 2 layer circuit. I could share details of the Layout if needed by private mesage

Any idea about what can i do?

Hi Gonzalo,

What are diodes DZ1-DZ4?

Best Regards,

Hi Irwin

The model is B520C-13-F   5A 20V        Diodo, B520C-13-F, 5A, 20V, DO-214AB (SMC), 2-Pines | RS Components (rs-online.com)

Hi Gonzalo,

It doesn't appear the diode would be the problem. What is the part number of the current sense resistor?

I'll look a the part datasheet for the current sense resistor first then you can try the following if the resistor is okay.

I'm not sure if you'll be able to do this, look at the voltage across the current sense resistor.  I would only use one channel of the oscilloscope and connect the scope ground to the Vin/CSP side of the resistor after verifying the scope ground is isolated from your circuit ground.  Then measure the CSN voltage triggering on a negative slope since it will be a negative voltage in the 100's of mV (basically measuring across the current sense resistor).  The scope probe connection will have to be a low inductance connection (cannot use the scope ground lead).  You can search on-line for a method to do this.  You'll know if you find it if you see a coiled wire that the scope probe ground barrel contacts.  Search on "spring wire scope ground" to get an idea.  This can be made with solid wire wrapped around the ground barrel of the scope probe (after removing the plastic part that holds the ground lead on).

What you are trying to see is if the current through the resistor is causing the voltage to trip the peak current threshold.  It should look like the voltage ramping up to peak current threshold but I suspect it has a leading edge current issue.

Best Regards,

Hi

I Will try to do that. I never have done that before but i Will try

Can you please Tell me what do you mean with a leading Edge issue? What does It meses and what would be the solución?

Hi Gonzalo,

First I'd like to get the current sense resistor part number, it could be related to that.  If you have pdf plots of the layers I can look at that as well.

The reason I asked about the diode was to see what kind of diode was used.  If it is a slow response diode there can be a large diode recovery causing current through the current sense resistor to trip the peak current threshold.  This can also happen if there is inductance in the current sense resistor path.  If it trips early it will not reach regulation and in your case it actually takes a few pulses to start, hence the delay of 600 us (two maximum off-times).

Best Regards,

I will check the exact referency to my PCB supplier. It should be a Resistor with the next characteristics

Resistor, 0.091 ohm , 1% Tolerance, 2512 Size, 1W

Thanks Gonzalo, I need the part number to find out what kind of resistor it is, film or wirewound.

Thanks,

The exact reference is TLM3ADR091FTE

Hi Irwin:

did you have the time to take a look?

Regards

Hi Gonzalo,

It's not a wirewound so it should be fine.  Can you send a pdf of the two layers of your board?

Best Regards,

Hi Gonzalo,

Thanks for sending the layout.  Unfortunately it looks like your layout is, most likely, the cause of what is going on.  The bypass capacitors for the LM3409s are not near the LM3409s.  Your ground returns are really broken up on the second layer and there are not many vias tying the upper ground plane to the lower ground plane.  The routes from the current sense resistors are long and run through noisy areas of the board.  The current sense resistors and LM3409s should be located close together.  Look at 11.1 on page 37 in the datasheet and the EVM to get an example of what the layout should look like.  You could try placing bypass capacitors close to the ICs with minimal inductive loop to see if it improves but there's still the issue of the long current sense lines that can pick up noise.

Best Regards,

Hi Irwin:

Some question from my side. 

- With bypass cappacitor you mean Cf1, Cf2, Cf3 and Cf4? or any other capacitor? I see them close to Lm3409

- With the ground return comment you just mean that I have few vias between both layers or there is any other question behind?

regards

Hi Gonzalo,

C8, C9, C10 and C11, these are the high frequency bypass for Vin which generates VCC.  VCC gets pulses of current from it as the gate of MOSFET turns on.

The return for the current sense signals do not have a direct return path under it creating an inductive pickup loop.  Since you have some ground plane on the top currents could be directed through it via vias so shrink the loops.  di/dt from switching will generate voltages on conductors with inductive loops.  If you look at the traces coming from the current sense resistors there should be a return ground under it.  If you look at your ground and follow the current path back you will see it creates a fairly large loop with respect to the current sense signals.  Are the inductors non-shielded, they look like they are drum type?  If they are not shielded and are near these traces they will also create noise on traces due to the magnetic field.  Then you have the MOSFET near or in the loop as with.  These parts are where di/dt comes from.  In reality the LM3409s should be near the current sense resistor and Vin bypass capacitors.  The switching loops should also be small.  If the inductors are not shielded they should not be near the current sense lines.  The current sense lines should be very short, see the datasheet and EVM as examples.

The LM3409s should be sitting near RSNS1, RSNS2, RSNS3 and RSNS4 possibly where Cin1, Cin2, Cin3 and Cin4 are.  Cin1-4 are less critical than C8-11.  Cin1-4 are not good for rejecting high frequency, C8-11 are hence why you want C8-11 close to the LM3409.

Best Regards,