Hello Team,
My customer intend to use current sense resistor instead of CT.
1. Should customer place Rsense at HV FET source pin to gnd, is that correct?
2. In order to reduce power losses, low Ohmic Rsense is preferred to use, thus lower scale input to CSA/CSB is expected and PKLIM pin would be set at lower level such as 1V or 0.5V, can they do that? is there any potential risk of setting lower PKLIM and CSA/CSB such as 0.5V~1V rather than 3V~3.5V?
Thanks,
Martin