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TPS736: TPS736

Part Number: TPS736
Other Parts Discussed in Thread: TPS730

Hi,

    1. The TPS736 datasheet have the separate specification for current Limit and short circuit current. But in many other datasheet have only current limit. I feel in TPS736, short circuit and current limit is different. 

Below sharing my understand on this, please correct me if my understanding on this is wrong.

                     A): At Current limit condiction : Output voltage will be stable (3.3V in the case of 3.3V LSO) and current will be same (Limiting current of Max of 800mA) even though the load varies.

                     B). Short Circuit condiction: Output voltage will be  zero and current will be settle to 400mA (typ) .

2. First Test condition for current limit is Vout=0.9xVout(nom), please let me know, how this condition is achieved since the output voltage of LDO is fixed ?

Vout(nom) : Is the typical value of LDO output (3.3V in case of 3.3V LDO) ?

Regards

Anuraj NK

    

  • Hi Anuraj NK,

    The reason that you see both a current limit line and a short circuit current limit line in the Electrical Characteristics table is that TPS736 has a foldback current limit.  Unlike a traditional "brick-wall" current limit where the current limit is the same value regardless of output voltage, a foldback current limit has a lower current limit at lower output voltages.  This helps protect the LDO in the event of a short circuit.

    When we test the current limit for the LDO, we force the output voltage to 90% of its nominal value (ie we force 2.97 V for TPS73633 which has a nominal 3.3 V output)

    Very Respectfully,

    Ryan

  • Hi Rayan,

    Thanks for your replay.

    I am preparing a Load board for LDO validation . Thats the back ground for this question.

    Can you tell me, How forcing 90% of nominal voltage to output of LDO will test the current limi ?

    I am giving 3.8V (Vnom+0.5V) as input and enabling (EN is 1.7V) the LDO. The output voltage will be 3.3V, as per your above mail, I have to force 2.97V on this 3.3V line and measure the input current of LDO. Can you confirm this procedure or correct me if i am wrong.


    Regards
    Anuraj NK
  • Hi Anuraj Nk,

    Your procedure is correct. In order for this to force current limit you need to ensure that both the input supply and the load supply (the voltage supply that you are using to force the 2.97 V) have their current limits set above the LDO's maximum current limit. In effect the load supply needs to be stronger (more current drive ability) than the LDO so that the voltage on the output of the LDO is set by the load supply. The LDO's feedback loop will see that the output is not high enough and drive the pass element as hard as possible allowing more current to pass through the pass element in an attempt to raise the output voltage to the correct voltage (3.3 V in your case). By ensuring that the load supply has more current capability than the maximum current limit of the LDO, when the LDO drives the pass element to allow more current through the LDO, the current limit circuitry will be triggered.

    Very Respectfully,
    Ryan
  • Hi Ryan,

        I have one more query regarding the Feed back pin current testing.In TPS730 datasheet the specification is below.

    For testing this, Need to force 1.8V from ATE to FB pin and check the current ?

    What should be the status of output voltage that time? I fell the output wont be stable.

    Please suggest the steps to validate this parameter.

    Regards

    Anuraj NK

        

  • Hi Anuraj NK,

    You are correct that we are forcing 1.8 V on FB and measuring the current. As the FB node is being driven high, the error amp will drive the pass element hard off. This will cause the output voltage to go to ground.

    Very Respectfully,
    Ryan