Dear Sirs or Madams,
If my understanding is correct, generally speaking the voltage on OUT pin of LDO should NOT exceed that on IN pin
in order to avoid the reverse current from OUT pin to IN pin.
But on our prototype board, the voltage on OUT pin becomes about 0.8V higher than that on IN pin
which I refer to as reverse voltage here, only during powering down of IN pin side.
Currently we are NOT sure on what paths the electrical charges on OUT pin side are discharged,
so we are NOT sure if the reverse voltage mentioned above actually causes reverse current from OUT pin to IN pin.
On this condition, should we take any countermeasures to avoid the reverse voltage?
Best regards,
Shinsuke Tanaka
Schottky