Other Parts Discussed in Thread: TINA-TI
Tool/software: TINA-TI or Spice Models
I would like to drop a PFET's gate a fixed voltage from PFET's source.
It seems like I could use a negative LDO to provide this offset. By connecting the negative LDO-Gnd to VpfetSource and the negative LDO-In to ground.
I can not get this approach to simulate. I attached the simulation. When I set the voltage supplies to VS1=0 and VS3=-10 it works as expected. When I set the same supplies to VS1=10 and VS3=0 it fails horribly. I can't see why the part would care about its absolute voltage.
Is this possibly just a simulation artifact where something inside the model is referenced to the circuit ground?
