TPS61088: TPS61088

Mihir Bhatt

Part Number: TPS61088

Hello,

We are using TPS61088RHLR boost converter. System is desiged as below.

(1) Vin : 3.4 - 4.2V (2) Vout : 5V (3) Iout : 6A (4) Fsw = 600 kHz

Que.1 As per TPS61088RHLR recommended layout, the SS pin capacitor is connected to PGND, where as in schematics it is connected AGND. We need to confirm about the placement and change the connection in according. What would be the correct connection?

Que.2 There is 6A load current on full load. Therefore maximum power consumption is 30W and maximum power dissipation is 2.72W. But average power consumption is nearly half od maximum value. We want to calculate pcb copper heat sink area for above condition. Do you have any tool to calculate heat sink area for above boost converter? Please provide notes to calculate average power dissipation in boost converter, if any

Regards,

Mihir

over 6 years ago

0 Helen chen over 6 years ago

TI__Mastermind 40080 points

The SS cap can be connected to the PGND, but the FB network and the COMP must be connected to the AGND, you can refer to the TPS61088 layout guide line in the DS and UG.

When Vin=3.4V, Vo=5V, Io=6A, the efficiency is about 93% based on the EVM board. The IC temperature on the EVM Board <70C. I suggest you apply for a TPS61088 EVM board to test it. And you must use a 4-layer board to handle the thremal.

0 Mihir Bhatt over 6 years ago in reply to Helen chen

Intellectual 290 points

Hello Helen,

Thanks for sharing information. Now for thermal analysis we have simulate on webench and for the same condition mentioned in above message T(top)=79C and T(bot)=71C even though their theta JC(top) and theta JC(bot) value are very different. What is the reason behind this results? Please send some notes or calculation regarding temperature rise at different nodes of IC and PCB. Also share calculation for heat sink required for the same.