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TPS5450: Transient Response with diode OR-ed TPS5450.

Part Number: TPS5450

I observed 200mV glitch with diode OR-ed TPS5450. With single TPS5450, it was 60mV.

I want to reduce the glitch less than 100mV.

Input voltage = +24V. Output voltage = 3.7V. Current was changed from 100mA to 380mA.

I'm looking for some guidelines for that.

  • user4403086,

    This may be due to the additional voltage drop across the diode when going from 100mA to 380mA. Check the IV curve on the diode datasheet. If not:

    Can you share a schematic? Why are you diode ORing?

    -Sam
  • Samuel-san;

    Thank you for your quick response.

    I should have separated the diode VF(Forward Voltage drop) increment and the Transient Response.

    Here are the schematic and the waveforms(TPS5450 single, and diode OR-ed). As you can find in the waveform, 210mV glitch is made of 50mV VF increment plus 160mV Transient Response (in case of step change from 100mA to 380mA). Is it normal for TPS5450?

    I guess glitche increases  along with the ratio(after/before step change) increase, or initial current value decrease(strongly related to the ratio, though). The initial current value is decided by ballance of the two sets of (TPS5450 + diode VF), when they are Diode OR-ed. Initial value will be minimum(and, glitch will be maximum) when the ballance is perfect.

    I am planning to add a dummy load to increase the initial value (from 100mA to 150mA or so) , to decrease the ratio,  and to decrease delta VF.

    Actual measurement shows that the Transient Response is improved from 160mV(210mV - 50mV(delta VF of SBD)) to 50mV(90mV - 40mV(delta VF of SBD)), when a 50mA dummy load is added after Diode OR.  TPS5450 output voltages are 3.451V and 3.454V.

    I also measured 288mV glitch with single TPS5450 (without diode OR), when stepping from 50mA to 500mA. Is it normal, too?

    Data sheet shows only one case of 1.25A to 3.75A. I cannot decide this 150mA initial value is safe for +280mA current step.

    Can we estimate glitches caused by other than the combination of 1.25A to 3.75A (e.g. 150mA to 430mA) ?

    Any other recommendation to improve Transient Response will also be appreciated.

    P.S. The reason of diode Oring : The unit has group-1 circuit, group-2 circuit, and common circuit (1+1 redundancy). The common circuit must work under single group failure. So, power for common circuit is fed by diode ORing the group-1power and group2 power.

    Best regards,

  • TPS5450_diode_OR_sch_wf.pdfIt seems that I missed to attach the file. So, I re-Reply with the attachment. Previewing the file was successfull.

  • user4403086-san,

    Thank you for sharing the schematic and waveforms. I have some thoughts and I'll number them so we can keep track.

    1. The response time for each transient response is very different. ~100us for the top waveform and ~250us for the bottom. This makes me feel like the voltage at R1307 for the second waveform isn't dropping as soon as you load at R1401. This could be due to some impedance between the two points (R1307 might have some non-zero resistance, the layout might play a roll) but it would be interesting to see the second waveform again but with the voltage at R1307 probed as well.

    2. Stepping from 1.25A to 3.75A may give better transient response than 100mA to 380mA. This is because 1.25A and 3.75A are probably both in Continuous Conduction Mode. 100mA to 380mA might go from Discontinuous Conduction Mode to Continuous Conduction Mode which often has slower transient response. You can check this by probing the PH node. If you see switching from VIN to GND, you're in CCM. If you see VIN to GND to (maybe some ringing) VOUT, you're in DCM.

    The dummy load you mentioned might bring that 100mA DCM point to 150mA CCM. Best to probe to make sure, though.

    3. You can improve transient response in two ways:

    • A) Improve bandwidth so it reacts faster.
      • Your first plot shows response time of ~100uA which is 10kHz BW which is fine.
      • We should definitely find out why the second plot takes so long to respond, though.
    • B) Slow the droop until the part responds.
      • You can do this by adding capacitance to the VOUT of the part (node2 of the inductor). It looks like you already have 330uF+some so that's probably fine.

  • Samuel-san;

    Thank you for your quick response and very valuable point-out.

    Attached are the data.

    1. Waveform of R1401 again with the voltage at R1307 as well.

       The difference was only the VF increment effect.

    2. Monitored PH node of TPS5450 at step change of 100mA -> 380mA.

       The waveform was full of alias, but it seems that taking 560us to enter CCM from DCM.

    Please verify above reading.

    TPS5450_diode_OR_sch_wf2.pdf 

  • How far is TPS5450's output from R1401 in the PCB ?

    May be what you are seeing is PCB parasitic inductance causing the big droop . Can you please add a bulk cap near to the node R1401 . 

    ---Ambreesh 

  • TLP5450_PCBtraces.zipAmbreesh -san,

    Thank you for your comment.

    Please remember that the waveform at R1307 has same droop.

    I attached PCB traces around two TPS5450s and R1307.

    (R1401 is 35mm distant from R1307)

    I believe that the path from TPS5450 PH node to R1307 is shortest.

    Path PH node - diode - GND is also shortest.

    Path Ph node - L - C - GND is also shortest.

    Will you chech that?

    If adding a bulk cap. is still helpfull, please tell so.

    How much capacitance shall it be? 10uF ceramic cap. is already there.

    Best regards,

  • Yes please add the same capacitance  as you are using at C1318 ie 330uF EEHZC1E331P   nearby R1401 to verify .

    Here are some suggestions for the layout :

    Also please try to add feedback resistors close to Vsense pin .

    ---Ambreesh 

  • Ambreesh-san,

    Thank you for your quick response.

    Unfortunately, we don't have spare 330uF EEHZC1E331P, and need some day to obtain.

    Before purchasing it , I have questions.

    Do you think that the droop is abnormal?

    If so, could you provide some target value that should be measured?

    And, I also need to know the minimum current to let it stay in Continuous Conduction Mode(CCM).

    Best regards,

  • The design will be in CCM at 200mA output current .
    The droop at R 1401 seems to be little higher . Do you have a facility to take the bode plot of the design ? If possible take the bode plot with everything connected and load at R1401 .

    For a time being you can also remove C1318 and place it closer to R1401 and re test the load transient .

    ---Ambreesh
  • Ambreesh-san,

    I'm sorry for late answer.

    First, we don't have facilities to take the bode plot.

    Second, I must prevent the TPS5450s from entering DCM, anyway.

    Generally, I asume that the threshold between CCM and DCM is determined by the "minimum controllable on time".

    Give me advices how I can let the TLP5450s stay in CCM?

    The threshold should vary by the combinations of input voltage and output voltage.

    So, following are the conditions of usage;

    Input voltage : +24V +/-5%

    output voltage : +3.5V +/-2%

    minimum load current per TLP5450 : 50mA (current design)

    Diode-ORing two TLP5450s and the  load is at the OR-ed point may have misled you.

    The current change from 100mA to 380mA is equivalent to 50mA to 190mA for each TLP5450.

    And, with IC1313 alone, I discovered the following;

    IL = 0mA to 60mA : DCM

    IL = 70mA - : CCM

    Best regards,

  • Are you trying to OR two power supply ? Is it for current sharing ? If it for current sharing this design wont work .

    Generally speaking, you cannot connect two devices in parallel to increase output current.  There is no mechanism to allow the two circuits to share the load equally.  One will tend to go towards current limit, while the other will be at light load.  You could conceivably use load sharing controllers to accomplish this.

    As far as DCM /CCM operation is concerned , the transition is dependent on various parameters and the minimum inductance needed to be in CCM mode for a particular current is given below :

    If you want to continue switching in CCM mode at lower load , you would need to increase the inductance . Use 68uH  as output inductor to continue switching at CCM mode .

    ---Ambreesh 

  • Ambreesh-san;

    Thank you for your information.

      First, the purpose of diode-OR is redundancy as I replied on Jan 10, 2018 9:50 PM.

    Total current (=1.6A max.) is far below the allowed max. current (=5A) of single TPS5450.

    Is it acceptable?

      Second,  I have read "SLVA059A - Understanding Buck-Boost Power Stages in Switch Mode Power Supplies", and agree with you.

      Third, I have found that the largest cause for the big droop is "pulse skip mode", not DCM.

    I measured droop with the combination of initial current(40mA to 100mA) and increment current(90mA to 170mA).

    - I found that the threshold of DCM/CCM is about 200mA as you mentioned before.

    - Even in DCM the droop is about 50mA and is acceptabley small. (<100mA is OK)

    - I found that in the region of initial current < 70mA, the droop increase rapidly.

      In this region the TLP5450 works in pulse skip mode.

    I also measured with single TLP5450 50mA ---> 240mA step change;

    1. No significant droop immediate after step change.

    2. Afterward, output voltage decays gradually for 400us, resulting 200mV droop.

    3. During 400us the TLP5450 stays in DCM.

    4. After 400us the TLP5450 goes to CCM and output voltage recovers gradually taking 300us.

    My goal is to suppress the droop <100mV, if not, voltage supervisor IC trips, and resets FPGA.

    Can we culculate the threshold current of pulse-skip-mode?

    If the threshould could be clear, I'm planning to increase minimum load current.

    Any suggestions will be appreciated.

    Best regards,