Hello,
I recently created a custom board based on the AM3352ZCZ, with DDR3 so I selected the TPS65910A3 as the PMIC (I was mainly basing off the SK.) I basically created a straight copy of the SK design, with three changes:
1) I did not use an external RTC LDO, I just wired the VRTC output of the PMIC to the AM3352, since I figured I wasn't going to use the PMIC in RTC only mode anyways. I got lucky here because I got mixed stock of the PMIC from TI samples, and ended up wtih the -A31 on half the boards. So, I'm changing the BOM to specifically call out the -A31 part from here forward.
2) I did not wire RTC_PORZ to anything. I know now this is a problem, but at the time I didn't figure it would hurt since I wasn't using RTC anyway. The PMIC enable still goes high (VRTC level) and turns on the PMIC. I will design in the delay circuit next board spin.
3) I wired INT1 and SLEEP to the AM3352, figuring it can't hurt if I ever want/need to use them. I also connected both sets of I2C pins.
My problem is that the voltages on the PMIC all come up higher than expected:
VRTC - 2.6V
VDD1 - 1.5V
VDD2 - 1.5V
VIO - 2.6V
VDIG1 - 3.0V
VDIG2 - 2.29V
VAUX33 - 3.77V
VMMC - 3.77V
VDAC - 2.29V
VPLL - 2.29V
VAUX1 - 2.29V
VAUX2 - 3.77V
I isolated the PWRHOLD on the PMIC from the PMIC enable on the AM3352 and reapplied power and still get VRTC at 2.2V. The only thing I could find is that a couple other people had the same problem, and the only solution I found was that someone had BOOT1 tied to VDAC instead of VRTC. On my board BOOT1 is correctly tied to VRTC.
I know that my RTC_PORZ is not correct, but it's the only thing I can find that is fundamentally "wrong" with my board vs. any of the reference designs. Could this really have an effect on the voltage levels the PMIC comes up as? Perhaps VRTC coming up at 2.6V, then the PMIC enable being pulled up to 2.6V instead of 1.8V zapped the PMIC somehow?
I have verified that all parts and connections on the PCB match the schematic for good measure.
(don't worry about the confidential note, this section is just a copy of the reference design which is public domain)
Thanks in advance to anyone that can shine some light!
Adam