Part Number: CSD95375Q4M
I'm very impressed with the performance and integration level of the Synchronous Power Stage. I would like to use the CSD95375Q4M in the following configuration, which is a little different than the typical application in the datasheet.
The switching topology is a buck+boost conveter, with 2x CSD95375Q4M ICs in a bridge-like configuration with the inductor in the "middle" of the bridge. So IC1 Vin is connected to Vbat (0.85-3.9V), Pgnd is connected to Vbat-neg(0V), and Vsw is connected to L1(terminal 1). IC2 Vin is connected to Vout (0-3.7V), Pgnd Vbat-neg(0V), Vsw L1 (terminal 2).
Vdd is supplied externally at 5.0V nominal.
To achieve this configuration I need 100% duty cycle on the non-switching side of the bridge (IC2 High in buck mode, IC1 High in boost mode). The control of the PWM and SKIP# pins is achieved through digital control.
Here are my questions:
1. The datasheet specifies a maximum on-time duty cycle of 85% ("6.2 Recommended Operating Conditions"). I assume that this is required by the bootstrap capacitor design. I'd like to provide my own high-side gate drive supply voltage ("Vgd") via a schottky diode into BOOT pin (thus replacing the BOOT capacitor). Assuming this is provided, can I drive the PWM pin to provide 100% high-side on duty cycle?
2. Assuming 1) is possible, what should Vgd be to not exceed the Vgs rating of the internal MOSFET? Nominal operating voltage range on the Vsw pins will be in the range of 0-3.9V. So would a Vgd of 7V for example be safe?
Product Marketing Engineer, Mid-Voltage FET
In reply to Brett Barr1:
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