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PROCESSOR-SDK-AM335X: HSR PRP Integration

Part Number: PROCESSOR-SDK-AM335X

Hi ,

Can anyone one help to solve following queries?

We are integrating HSR/PRP on AM335x with Quadros. For that we have sample quadros application having quadros_shell to do the ping test. It is using ICSS_EMAC eth configuration.

with DUAL_MAC mode able to do the ping test using PRU 0.

  • HSR/PRP able to work on DUAL_MAC mode or we need to configure to SWICH mode? (we tried with changing it to SWITCH mode and then we are not able to do the ping test)
  • What are the basic needs of HSRPRP to work on Quadros. (Currently we have PRU-ICSS-HSR-PRP-DAN-01.00.05.01-Linux-x86-Install.bin and pdk 1.0.12
  • Do we need to integrate SNMP to work with HSR PRP ?
  • Hi Vipul Kole,

    Sorry for the delayed response,

    HSR uses Switch application and PRP uses Dual mac application, so if your using HSR you need to configure it to switch mode , for PRP you need to configure it to dual mac mode.

    Basic needs of HSRPRP are HSR-PRP-DAN and PDK.

    No need to integrate SNMP to work with HSR-PRP.

    Regards,

    Roopak

  • Thank you Roopak.

    So as per the suggestion we changed the mode to switch, loaded and enabled both PRU (icss_emac_switch.bin)

    AS of now we not integrated the hsr code. just checking with the SWITCH mode configuration. 

    for that we found that if we do the ping request it is not successful. It is getting stuck at some point of code. while debugging, we found that it stuck in ICSS_EMAC_osalPendLock(((ICSS_EmacObject*)emachandle->object)->txSemaphoreHandle, SemaphoreP_WAIT_FOREVER);

    Code Changes:

    DUAL_MAC (Working)

    switchEmacCfg->phyAddr[0] = BOARD_ICSS_EMAC_PORT0_PHY_ADDR;
    switchEmacCfg->portMask = ICSS_EMAC_MODE_MAC1;
    switchEmacCfg->ethPrioQueue = ICSS_EMAC_QUEUE1;
    switchEmacCfg->halfDuplexEnable = 1;
    switchEmacCfg->enableIntrPacing = ICSS_EMAC_ENABLE_PACING;
    switchEmacCfg->ICSS_EmacIntrPacingMode = ICSS_EMAC_INTR_PACING_MODE1;
    switchEmacCfg->pacingThreshold = 100;
    switchEmacCfg->learningEn = 0;
    switchEmacCfg->rxIntNum = 20;
    switchEmacCfg->linkIntNum = 26;
    SOCCtrlGetPortMacAddr1(1, lclMac);
    switchEmacCfg->macId = lclMac;
    ICSS_EmacInit(emachandle, &pruss_intc_initdata,ICSS_EMAC_MODE_MAC1 | ICSS_EMAC_MODE_DUALMAC);

    SWITCH MODE (Not Working)

    switchEmacCfg->phyAddr[0] = BOARD_ICSS_EMAC_PORT0_PHY_ADDR;
    switchEmacCfg->phyAddr[1] = BOARD_ICSS_EMAC_PORT1_PHY_ADDR;
    switchEmacCfg->portMask = ICSS_EMAC_MODE_SWITCH;
    switchEmacCfg->ethPrioQueue[ICSS_EMAC_QUEUE1] = 1 ;
    switchEmacCfg->ethPrioQueue[ICSS_EMAC_QUEUE2] = 0 ;
    switchEmacCfg->ethPrioQueue[ICSS_EMAC_QUEUE3] = 1 ;
    switchEmacCfg->ethPrioQueue[ICSS_EMAC_QUEUE4] = 0 ;
    switchEmacCfg->halfDuplexEnable = 1;
    switchEmacCfg->enableIntrPacing = ICSS_EMAC_ENABLE_PACING;
    switchEmacCfg->pacingThreshold = 100;
    switchEmacCfg->learningEn = 1;
    switchEmacCfg->rxIntNum = 20;
    switchEmacCfg->linkIntNum = 26;
    ICSS_EmacInit(emachandle, &pruss_intc_initdata, ICSS_EMAC_MODE_SWITCH);

    PRU Enable Code

      uint8_t firmwareLoad_done = 0;
        /*Initialize the PCP 2 Q map*/
        initializePCPtoQueueMap(emachandle);
    
        PRUICSS_pruDisable(pruIcssHandle, ICSS_EMAC_PORT_1 - 1);
        PRUICSS_pruDisable(pruIcssHandle, ICSS_EMAC_PORT_2 - 1);
    
        if(PRUICSS_pruWriteMemory(pruIcssHandle, PRU_ICSS_IRAM(0) , 0,(uint32_t *) &pru_imem0_rev1_start, &pru_imem0_rev1_end - &pru_imem0_rev1_start))
        {
            if(PRUICSS_pruWriteMemory(pruIcssHandle, PRU_ICSS_IRAM(1) , 0,(uint32_t *)&pru_imem1_rev1_start,&pru_imem1_rev1_end - &pru_imem1_rev1_start))
            {
                rtxc_printf("\nPRU Firmware Load done\n\n\r");
                firmwareLoad_done = TRUE;
            }
        }
         if(firmwareLoad_done)
        {
            int32_t ret_val = PRUICSS_RETURN_SUCCESS;
            ret_val = PRUICSS_pruEnable(pruIcssHandle, ICSS_EMAC_PORT_1 - 1);
            if(ret_val != PRUICSS_RETURN_SUCCESS) {
                rtxc_printf("\r\nPRU0 Failed to enable");
            }
            ret_val = PRUICSS_pruEnable(pruIcssHandle, ICSS_EMAC_PORT_2 - 1);
            if(ret_val != PRUICSS_RETURN_SUCCESS) {
                rtxc_printf("\r\nPRU1 Failed to enable");
            }
        }

    Please let us know if any other change is required to work with switch mode

  • Hi Vipul kole,

    The Switch firmware from PDK ($PDK_INSTALL_PATH\ti\drv\icss_emac\firmware) should be used along with the icss_emac as is. But incase of HSR PRP firmware (PRU-ICSS-HSR-PRP-DAN_01.00.05.01 package), the icss-emac should be patched with the patch file provided (PRU-ICSS-HSR-PRP-DAN_01.00.05.01\protocols\pdk_patches).

    Based on above details which you have provided it seems you are using switch firmware with patched icss_emac. Can you please confirm this?
    This combination of icss emac and firmware is not supported.

    Regards,

    Roopak