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PROCESSOR-SDK-AM335X: PROCESSOR-SDK-AM335X: AM335x Sitara AES HW Cryptography

Part Number: PROCESSOR-SDK-AM335X

Hi Everyone,

I still have questions about the crypto TRM.

I have some questions about the AES and especially about the key. I noticed that the 8 key registers (AES_P_KEY(X)) are mixed.

Beginning by 6 and ended with 1. LSW and MSW are mixed too.

Could I have more information on how to correctly fill in my key? (For 128 bits, 192 and 256)

Here’s what I understand is true?

switch(keysize)
	{
		case 128:
			mbedtls_printf("[AES]Key size is 128 bits");
			HWREG(baseAdd + AES_P_CTRL) |= keysize << 1;
			HWREG(baseAdd + AES_P_KEY1_3) = key[0]; //MSW for 128
			HWREG(baseAdd + AES_P_KEY1_2) = key[1];
			HWREG(baseAdd + AES_P_KEY1_1) = key[2];
			HWREG(baseAdd + AES_P_KEY1_0) = key[3]; //LSW for 128
			break;
		case 192:
			mbedtls_printf("[AES]Key size is 192 bits");
			HWREG(baseAdd + AES_P_CTRL) |= keysize << 2;
			HWREG(baseAdd + AES_P_KEY1_5) = key[0]; //MSW for 192
			HWREG(baseAdd + AES_P_KEY1_3) = key[1];
			HWREG(baseAdd + AES_P_KEY1_2) = key[2];
			HWREG(baseAdd + AES_P_KEY1_1) = key[3];
			HWREG(baseAdd + AES_P_KEY1_0) = key[4];
			HWREG(baseAdd + AES_P_KEY1_4) = key[5]; //LSW for 192
			break;
		case 256:
			mbedtls_printf("[AES]Key size is 256 bits");
			HWREG(baseAdd + AES_P_CTRL) |= keysize << 3;
			HWREG(baseAdd + AES_P_KEY1_7) = key[0]; //MSW for 256
			HWREG(baseAdd + AES_P_KEY1_5) = key[1];
			HWREG(baseAdd + AES_P_KEY1_4) = key[2];
			HWREG(baseAdd + AES_P_KEY1_3) = key[3];
			HWREG(baseAdd + AES_P_KEY1_2) = key[4];
			HWREG(baseAdd + AES_P_KEY1_1) = key[5];
			HWREG(baseAdd + AES_P_KEY1_0) = key[6];
			HWREG(baseAdd + AES_P_KEY1_6) = key[7]; //LSW for 256
			break;
		default:
			mbedtls_printf("[AES]Unable to determine Keysize (128,192 or 256 bits) : Please check your configuration\n");
			return;
	}

Thanks.

Alex.