AM3351: Which value is used for ODT's PU and PD for DATA lines if DDR controller.

Hi friends!

So, the main question is listed in the title. I can't figure out where the PD and PU resistors (terminating) values come from in the DDR3 (EMIF) controller. In the SPRUH73P reference manual on page 932, Table 7-221 SDRAM_CONFIG Register field descriptions, the reg_ddr_term bits tell me that for ODT values I should reference the RZQ value. What is this meaning? Where can I get it? Is this the value from the DDR3 memory chip?

Thank You!