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DRA829V: RS485 access from main R5 core

Part Number: DRA829V
Other Parts Discussed in Thread: DRA829

Hi team,

our customer want to use main R5 core of the DRA829 for RS485 communication using DMA alongside QNX running on A72. on the below configuration.

we having following queries

1. Does all UART ports of Main Domain is accessible to R5 core.

2. is UART module can be used by both QNX and R5 core application

3. how can we load r5 core application form QNX

4. How to enable DMA  access to R5 core as they want to use 16 DMAs (RX x 8, TX x 8, eight groups) for RS485 communication.

  • Hi,

    Can you provide the following details ?

    1. Which SDK are you using ?

    2. Are you running TI-RTOS on R5F ?

    Does all UART ports of Main Domain is accessible to R5 core

    Yes, they are accessible but the UART's are partitioned in SDK and we recommend to keep it that way unless your hardware is designed other way.

    2. is UART module can be used by both QNX and R5 core application

    The UART's are partitioned between cores. For example QNX uses Main UART 0 and Ethernet Firmware uses Main UART 2. Can you provide which UART's you want for which core ?

    4. How to enable DMA  access to R5 core as they want to use 16 DMAs (RX x 8, TX x 8, eight groups) for RS485 communication.

    You want to use DMA along with Serial or you want to use DMA to copy data to serial ?

    Regards

    Vineet

  • Hi,

    Regarding,

    3. how can we load r5 core application form QNX

    Loading of remote cores in PSDK QNX is done during SBL boot (or SPL boot if that is in use), there is no utility currently available on the A72 core at QNX runtime, to load an R5 core image.

    Regards,

    kb

  • Hello vineet/Kb

    Thanks for your feedback

    1. Which SDK are you using ?

    we are using PSDk QNX7.3 ; ti-processor-sdk-rtos7.3 and spl boot flow

    2. Are you running TI-RTOS on R5F

    No, we are plan to use Baremetal code for RS485 communication. 

    3. Can you provide which UART's you want for which core ?

    we have used Main UART0  for A72 Qnx log and Main domain 8 ports UART(1-8) for RS485 communication in our Application. Can we use mcu domain R5f core0(mcu_1_0) and R5f core1 (mcu_1_1) for writing our application. Is all main domain UART(1-8) can be accessed by the MCU R5f core. or it is accessible to only main domain R5f core.

    You want to use DMA along with Serial or you want to use DMA to copy data to serial ?

    we want to use DMA along with serial for RS485 communication in R5F core MCU domain.

    Is there any steps available to load r5 core application through spl?

    Is there any sample baremetal code available in sdk to understand the image loading steps.

    Is it possible to use UART(1-8) by both r5f application and QNX. or we need to use UART(1-8) only for r5f core application. 

  • Hi,

    Regarding:

    Is there any steps available to load r5 core application through spl?

     Please open a separate thread and lets work through this.  SPL loading of the R5 cores is included in the SDK.

    Regarding:

    Is all main domain UART(1-8) can be accessed by the MCU R5f core. or it is accessible to only main domain R5f core.

    Main domain modules are accessible from the MCU domain, however system isolation and safety cases should be considered when setting up the S/W architecture this way.   

    Regarding:

    Is it possible to use UART(1-8) by both r5f application and QNX. or we need to use UART(1-8) only for r5f core application

    Two different cores, should not be controlling the same UART.

    Regards,

    kb

  • Hi kb

    Sure I will open new thread on r5f firmware loading in spl boot flow

    Can you explain more details on system isolation and safety for our understanding.

    Is there any seperate driver available for the peripheral if writing code on r5f mcu domain to access the modules

  • Depending on how the system you are working on is being developed, the MCU island may include safety related S/W.    The MCU island provides an independent domain for safety functions with high FFI.   For example the MCU safety island allows for local S/W to function through a Main domain reset.

    MCU Domain S/W accessing Main domain resources from MCU domain, need to account for the possible failures which may occur, and in turn these failures need accounted for in safety plans for the system.   

    If the MCU R5 is controlling UART 1-8, system safety design may need to address items such as:

    • How should UART drivers behave if Main domain is reset?
    • How should UART drivers behave if an error in the UART1-8 is encountered?
    • Is the possibility of a Main Domain access, failing / stalling, addressed by the drivers on the MCU R5?

    Depending on how the MCU R5 is being setup, the drivers from the R5 Main domain should function.  Interrupts and DMA setup, will required some detailed investigation.

    Regards,

    kb

  • Thanks for the explanation

    i am working on code development using pdk library provided in RTOS SDk. for loading image i got the below link that explains firmware loading through spl and u-boot 

    [FAQ] TDA4VM: Different ways to load an RTOS or Baremetal application along with Linux - Processors forum - Processors - TI E2E support forums

    does this will work with also.

  • The sections for CCS, SBL, Loading R5 from SPL, and Loading from U-boot, on the FAQ link, would be the same approach if QNX was the HLOS in use on the A72, as opposed to Linux.

    Regards,

    kb