This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM4378: Could you help to check the least Schematic version of AM4378?

Part Number: AM4378
Other Parts Discussed in Thread: TMDSEVM437X, TLK105L

Hi  Ti 

We have an Ethernet/IP project.

Could you help to check if we can start design base on TMDSEVM437X?

We download the attachment -》AM437x General Purpose Evaluation Module (EVM) Schematic  SPRR396.ZIP (761 KB)

Could you help to check if TI has a higher version of the AM4378 design? 

One question is :

CAD attachments have 2 files, What is the difference between 1_4 and 1_5?----> AM437x General Purpose Evaluation Module (EVM) Design Files (CAD)  SPRR196.ZIP (28817 KB)

Same question for TMDSIDK437X

 Also, 2 files in Attachments, What is the difference between 1p3 and 1p4,>>>> AM437x/AMIC120 Industrial Development Kit (IDK) Schematic (Rev. A) — TIDRC79A.ZIP (1276 KB)

Could you help to check if TI has a higher version of this design?

We replace 4x 512MB 8Bit DDR3(TMDSEVM437X) with  2x 512MB 16Bit DDR3(TMDSIDK437X) ,Is it right?

I think the AM437x series are P2P for each other in DDR/ETH/eMMC/Nand Flash/Nor flash design. We can copy each other from a different designs.




  • Hi Qin,

    For the AM437x GP EVM, revision 1.5A is the latest/ final revision.  Here are the changes from 1.4 to 1.5:

    1 Remove R75 from layout
    2 Make a note that R35 is DNI so signal is floating during chip reset
    3 Connect VSS_RTC to DGND
    4 Correct EN_KALDO pulldown to make pullup to VDDS_RTC
    5 Update Camera #0 to the new Darling Industrial 2Mp camera module
    6 Update the Tamper signals to the correct 2 pairs to use
    7 Change pullup resistors on SYSBOOT pins from 100K to 63K (or less) to adjust for leakage
    8 Change COM8 VBAT_COM regulator to supply 1A
    9 Add a jumper to select eMMC or NAND
    10 Add header for VPP programming

    For the AM437x IDK, revision 1.3A is the latest/ final revision.  Here are the changes from 1.2 to 1.3:

    1 Optimize DDR3 routing with layer 5 gnd reference
    2 Install R445 by default so that camera can be tested straightaway
    3 Swapping  J15 Pin 52 and 54 signals is important for EnDat analog daughter card to work on channel2 as well without any h/w mods.
    4 For ENDAT2, Issue is that R564 is not installed. (See DNI) below. Install a zero ohm resistor as R564. 
    5 For multi-channel EnDat demonstration (ENDAT1 and ENDAT2), need to remove R465 near U29 as EQEP and ENDAT pins are muxed and U29 drives on the same lines,  this will disable EQEP0 function. DNI R465 by default
    6 Enable for ADC power 1.8V regulator U69 needs to be driven by 5.0V but it must be sequenced with V1_8D rail
    7 Add a 220uF capacitor in parallel with C329 (V3_3D) and C303 (VDD_CORE)
    8 Change 2.8V camera regulator enable from V3_3D to V1_8D
    9 "Change motor current sense ADC inputs to:
      ADC0_AIN1: IS_IHB1
      ADC1_AIN1: IS_MIHB2
      ADC0_AIN3: IS_IHB2     <-change from beta
      ADC1_AIN3: IS_MIHB3
      ADC0_AIN5: IS_IHB3     <-change from beta
      ADC1_AIN5: IS_MIHB1  <-change from beta
      ADC0_AIN2: MOT1_ADC
      ADC0_AIN6: MOT2_ADC
      ADC0_AIN7: MOT3_ADC
      Make use of 9Kx2 resistors in the ADC1 pre-amp so 18K+4K = 22K"
    10 Remove the mux resistors that connect ADC0_AIN[7..0] inputs to the industrial input header
    11 Add resistor muxes to EnDAD/BiSS connection: Route PRU0_ENDAT0_CLK and OUT to either signal for connector and U30/U31.  Default resistor connection should be N24 to PRU0_ENDAT0_CLK and pin N22 to PRU0_ENDAT0_OUT
    12 Fix dynamic range by tweaking resistance
    13 Swap ENDAT channel 1 - CLK and OUT–  needs to be merged in production build
    14 Swap ENDAT channel 2 - CLK and OUT–  needs to be merged in production build
    15 SYS_BOOT settings do not enable quad read mode by default
    16 Connect PRUETH0_COL to TLK105L COL
    17 Connect PRUETH1_COL to TLK105L COL
    18 Also we need to swap eQEP1_STROBE/INDEX and eQEP2_STROBE/INDEX also to align with this change.
    19 AM437X_CAM1_DATA8 shall also be renamed to SD0_CLK_IN
    20 AM437X_SD_DATA_IN0 can also act as SD_CLK_OUT its main use case today. Please correct the schematics to reflect the same
    21 AM437X_CAM0_DATA6 : Main intent to put this in the expansion is to get access to eHRPWM1A
    22 AM437X_CAM0_DATA1:  ehrpwm3_synco

    To switch to 2x 512MB 16Bit DDR3, take a look at the AM437x starter kit (  This board uses the topology you're looking for.


  • >>>For the AM437x IDK, revision 1.3A is the latest/ final revision.  Here are the changes from 1.2 to 1.3:

    Qin-> Why 1.4 is not the final Version ?

  • Hi Qin,

    My mistake, we do not have a comprehensive change list for v1.4 of the IDK.  Below are the list of changes after reviewing the two BOMs.  I think the most consequential change is the ground reference on the 32KHz crystal.  The TRM should include details about why this was done.


    AM437x IDK Rev 1p3 to 1p4 changes
    R567 and R568 0-ohm res added: U11 PMU_PORz and PMU_HIBZ tied to DGND (these pins are unused and should be pulled low on AM437x)
    R571 0-ohm res added: Y3 32.768 KHz xtal load caps referenced to DGND 
    R13 DNI'd: do not tie V2_8A to V2_D
    R313 DNI'd: do not tie J5 pin 9 to V1_5D
    R569 and R570 DNI'd: this pins are reserved and should not be tied to DGND on AM437x