• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 100 subscribers
  • Views 195 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA2E: Video Encoder in Interlaced Mode

Wu BoHan
Intellectual 315 points
Part Number: TDA2E

Hi Expert,

I read the Application Report, SPRAC23A–March 2016–Revised November 2017, DSS BT656 Workaround for TDA2x.

2.1.4 Interfacing DSS With the ADV7343 Encoder in Interlaced Mode
For the interlaced display, VSYNC typically is expected to toggle at the start of the line for the even field display and for the odd field, it is expected to toggle in the middle of the line. DSS always outputs VSYNC aligned with the HSYNC, so it cannot generate VSYNC at the middle of the line.
Due to this issue, HSYNC and FID signal outputs from DSS are used to interface with the ADV7343 encoder.


a. The ADV7393 in the report is also an Interlaced Mode?

b. Is the DSS configuration of TDA2x for ADV7393 and ADV7343 the same?

c. Will the sync of RGB565 and RGB888 have the same issue?

d. If I want to use RGB Interlaced output on LCD1, how do I choose Video Encoder?

Could you please give some suggestions here?
Thanks in advance.

  • 0
    TI__Guru**** 398330 points

    Hi Wu BoHan,

    Please find answers to your questions.

    Wu BoHan said:
    a. The ADV7393 in the report is also an Interlaced Mode?

    Yes, ADV7393 must also be configured for NTSC/PAL interlaced mode.

    Wu BoHan said:
    b. Is the DSS configuration of TDA2x for ADV7393 and ADV7343 the same?

    Did not get the question. Can you provide some more info?

    Wu BoHan said:
    c. Will the sync of RGB565 and RGB888 have the same issue?

    Which problem are you talking about? I think ADV does not support RGB888 format, so we need to use RGB565.

    Wu BoHan said:
    d. If I want to use RGB Interlaced output on LCD1, how do I choose Video Encoder?

    Sorry did not get your question. This appnote supports only ADV7393 encoder. So can you use ADV7393?

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Intellectual 315 points

    Hi,

    Wu BoHan said:
    DSS always outputs VSYNC aligned with the HSYNC, so it cannot generate VSYNC at the middle of the line.

    I have the following questions about this issue:

    Brijesh Jadav said:
    b. Is the DSS configuration of TDA2x for ADV7393 and ADV7343 the same?

    Did not get the question. Can you provide some more info?

    b. Does the SD Video Output of TDA2x have the same problems described above in ADV7393 and ADV7343?

    c. Is there any restriction on SD Video Output to only use RGB565? Can RGB888 be used?

    Brijesh Jadav said:
    d. If I want to use RGB Interlaced output on LCD1, how do I choose Video Encoder?

    Sorry did not get your question. This appnote supports only ADV7393 encoder. So can you use ADV7393?

    d. ADV7343 uses two D-flops to delay the FID signal. ADV7393 does not require any changes. This shows that ADV7343 and ADV7393 are different. ADV7393 is not affected by the problems described above?

    Choose Video Encoder must be able to accept the above description issue?

    thk.

  • 0 in reply to Wu BoHan
    TI__Guru**** 398330 points

    Hi Wu BoHan,

    Wu BoHan said:
    b. Does the SD Video Output of TDA2x have the same problems described above in ADV7393 and ADV7343?

    The AppNode clearly describes limitation of TDA2x and how different solution can be used to interface it with ADV7393. Still i am not sure which problems are you talking about?

    Wu BoHan said:
    c. Is there any restriction on SD Video Output to only use RGB565? Can RGB888 be used?

    Not from TDA2x point of view, bit ADV does not support NTSC/PAL standard in RGB888 format. 

    Wu BoHan said:

    d. ADV7343 uses two D-flops to delay the FID signal. ADV7393 does not require any changes. This shows that ADV7343 and ADV7393 are different. ADV7393 is not affected by the problems described above?

    Choose Video Encoder must be able to accept the above description issue?

    Not sure, please refer to ADV specs, if it expects FID toggle during HS active period, then we would require flops.

    Regards,

    Brijesh