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SK-AM64: AM64 SK Board Questions

Part Number: SK-AM64

Hi,

    There are two questions about SK-AM64:

(1) VDD_CORE

What's the difference of VDD_CORE 0.75v and VDD_CORE 0.8v?There is no comments in AM64 datasheet.

Is it right  what I understood below?

VDD_CORE 0.75v--------AM64 SPEED GRADE K

VDD_CORE 0.8v--------AM64 SPEED GRADE S

From datasheet of AM64, 

(2) In 41th page of SK-AM64 sch,  there is a note "This power solution should not be used for a production system."

Could you explain why? Can we suggest customer to  refer this part for power design?

Thanks.

  • For question 2, it's due to over spec for VDD_CORE, right?

  • Hi Gary,

    For question 1, you may run VDD_CORE at 0.75V for both speed grades.  All rails that support 0.75V also support 0.85V, and allows the engineer to reduce BOM/ size if that is a priority over power consumption.

    For question 2, you are correct, the voltage output granularity spec on the PMIC was missed during the design phase.    As-is, we are slightly exceeding the ABS MAX spec of VDD_CORE.  We wanted to be very clear that the issue exists for folks that would otherwise copy the design as-is.  We will be revising the EVM in the future with a different PMIC solution that is not yet released.  For customers looking to go into production immediately, the recommendation is to power VDD_CORE with an external regulator, such as the TPS745, and use the LDO0 output of the PMIC to enable this regulator to maintain proper power sequencing.

    Regards,
    Mike

  • Hi Michael,

         Thanks for your reply.