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OMAP-L137: Downstream signal quality question

Part Number: OMAP-L137

Hello experts,

My customer have trouble in downstream signal quality test.
Customer follow the procedure in TRM, but there is no test packet from output pin. Could you give me advice?
DA830 is used as host of OTG with Hi-speed. (Connected with USB memory) TEST_PACKET
1.Start a session (if the core is being used in Host mode).
 ->The connection between USB memory is fine with normal power supply ON, so it should be no problem
2.Write the standard test packet (shown below) to the Endpoint 0 FIFO.
 ->Wrote 53 test packet on FIFO through debugger
3. Write 8h to the TESTMODE register (TEST_PACKET = 1) to enter Test_Packet test mode.
 ->Completed writing 8h to the TESTMODE register
4. Set the TxPktRdy bit in the CSR0 register (D1).
 ->Completed setting.

After these, there is no signal (test packet) from output, so customer can't confirm waveform.
If you have any question about situation, please let me know.

Also, could you tell me the meaning of " The test packet only has to be loaded once"?
Is there any procedure for finishing load once?

Thanks and best regards,
Ryo Akashi

  • Hello Ryo,

    Which SDK are you using for your USB test?



  • Hi Nick,

    I am the customer. 

    The SDK is CCS (Code Composer Studio).

  • Hello Dai,

    I am not sure if anyone on our team has tried a USB Test_Packet using bare metal code in CCS. I am going to send this thread to our Linux USB owner to see if they have any comments.



  • Hi Ryo,

    "load once" means the test packet to be written to the FIFO once and it will be transmitted repeatedly forever until reset. In typical usb transfers the FIFO becomes empty once the packet is transmitted.

    Your sequence 1-4 seems to be correct. Please ensure you use the index address of EP0 and made EP0 index active when accessing EP0 registers.

    Here is how Linux driver does it.

    400                         case 4:
    401                                 pr_debug("TEST_PACKET\n");
    402                                 temp = MUSB_TEST_PACKET;
    403                                 musb_load_testpacket(musb);
    404                                 break;
    420                         musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
    musb_load_testpacket() is defined as:
     439 void musb_load_testpacket(struct musb *musb)                                    
     440 {                                                                               
     441         void __iomem    *regs = musb->endpoints[0].regs;                        
     443         musb_ep_select(musb->mregs, 0);                                         
     444         musb_write_fifo(musb->control_ep,                                       
     445                         sizeof(musb_test_packet), musb_test_packet);            
     446         musb_writew(regs, MUSB_CSR0, MUSB_CSR0_TXPKTRDY);                       
     447 } 

  • Hi Bin,


    > musb_ep_select(musb->mregs, 0);

    Does this function just only set endpoint0?

    And in this function, it edits only index register?
    (0x01E0 040E INDEX Index Register for Selecting the Endpoint Status and Control Registers)

    I set 0 for EPSEL bits in this INDEX register, but USB test mode did not work.


  • Hi,

    > musb_ep_select(musb->mregs, 0);

    Does this function just only set endpoint0?

    Yes, write the ep number to the INDEX register.