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TDA4VM: TDA4 CSITX mipi ecc error hs-sync pattern error

Part Number: TDA4VM


Dear experts,

Enviroment:sdk7.2+qnx710+custom board

In our custom board,csitx connect maxim96717F serializer.

I config csitx 1lane mipi,the data can be transmitted normal.

when I config csitx 2 lane mipi,serializer register value shows that 2-bit ECC error detected.

when I config csitx 4 lane mipi,serializer register value shows that HS sync pattern with 2 or more bit errors detected on data lane 1.

I try to change mipi data lane speed,the phenomenon is the same.

so I want to know is this hardware problem or software problem?

BR.

  • Hi,

    What is the output lane speed you are using? 

    Is it possible to check it on SDK8.0? I think in SDK7.2 (and even in SDK7.3), we had limited number of the lane speed supported. So if you are using one of the unsupported lane speed, may not get correct output. 

    Regards,

    Brijesh