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AM5726: About system configuration

Part Number: AM5726

Hi,

My customer wants to use AM5726 in the following configurations. Can the system be realized with this configuration?
The OS is TI-RTOS and Non-SMP.

They want to use interrupts (MPU_IRQ_XX) for A15_0 and A15_1 respectively.
However, in the description of TRM, MPU_IRQ_XX seems to be common to A15_0 and A15_1.
I don't know if it can be used in each core

Best regards,
Sasaki

  • Hi Sasaki,

    It should be possible in theory, but the default SDK is not designed to support the above configuration.

    You would have to partition the interrupts between A15_0 and A15_1. The IPC code will need updates, today it treats both the A15 cores as a single MPU/HOST processor in the MultiProc configuration. You will need to use separate Mailbox User interrupts and FIFOs for A15_1 vs DSP.

    regards

    Suman

  • Hi Suman-san,

    Thank you for your reply.

    You would have to partition the interrupts between A15_0 and A15_1. The IPC code will need updates,
    You will need to use separate Mailbox User interrupts and FIFOs for A15_1 vs DSP.

    Is there any documentation or sample project to implement this?

    Best regards,
    Sasaki

  • Hi Sasaki-san,

    There is no ready-made sample project to implement this. You would have to modify a number of source files in IPC code base to get going (NOTE: This is definitely _not_ a trivial effort by any means).

    The Mailbox interrupts are assigned programmatically since there are a lot of processors. You can look in the following modules:

    1. packages/ti/sdo/ipc/family/vayu/Settings (base list of processors - both A15 cores are treated as single called HOST)

    2. packages/ti/sdo/ipc/utils/MultiProc

    3. packages/ti/sdo/ipc/family/vayu/TableInit (Mailbox assignment logic/table)

    The IPC code uses System Mailbox 5, 6, 7 and 8. So, it is a lot easier for you to setup things independently if you are trying to add your own IPC stack.

    Lookup InterruptHost.c, InterruptDsp.c and NotifySetup.c files under packages/ti/sdo/ipc/family/vayu folder to see how the interrupts are setup for the respective processors and crossbars.

    AM572x processors have a Interrupt Crossbar, so you have to also use the IntXbar module to connect the output interrupt line to the actual processor interrupt controllers.

    regards

    Suman