i Team,
My customer wants to know delay time for mmc_raw_access example code.
There is a delay operation for Function: MMCSD_LDO_PWR in
C:\ti\pdk_am57xx_1_0_17\packages\ti\csl\example\mmcsd\mmc_raw_access\main.c. as below.
Can you tell me the design intent of delay?
If this is a hardware limitation or requirement, would you please show us a manual page which is described as reference?
There is three delay action. The comments is all 10us. But actual action is 10us and 150us. Which is correct? Is comment not updated?
Delay(10); /* wait 10 us */
Delay(150); /* wait 10 us */
Delay(150); /* wait 10 us */
void MMCSD_LDO_PWR() { /*CTRL_CORE_CONTROL_PBIAS*/ uint32_t reg_val = 0; reg_val = HW_RD_REG32( SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS); reg_val &= ~CTRL_CORE_CONTROL_PBIAS_SDCARD_IO_PWRDNZ_MASK; HW_WR_REG32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS, reg_val); delay(10); /* wait 10 us */ reg_val &= ~CTRL_CORE_CONTROL_PBIAS_SDCARD_BIAS_PWRDNZ_MASK; HW_WR_REG32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS, reg_val); /*Enable SDCARD_BIAS_VMODE*/ reg_val |= CTRL_CORE_CONTROL_PBIAS_SDCARD_BIAS_VMODE_MASK; /* 3v */ HW_WR_REG32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS, reg_val); reg_val = HW_RD_REG32( SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS); reg_val |= CTRL_CORE_CONTROL_PBIAS_SDCARD_BIAS_PWRDNZ_MASK; HW_WR_REG32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS, reg_val); delay(150); /* wait 10 us */ reg_val |= CTRL_CORE_CONTROL_PBIAS_SDCARD_IO_PWRDNZ_MASK; HW_WR_REG32(SOC_CTRL_MODULE_CORE_CORE_PAD_REGISTERS_BASE + CTRL_CORE_CONTROL_PBIAS, reg_val); delay(150); /* wait 10 us */ }
Thanks and Best regards,
Kuerbis