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TMS320C6745: Phenomenon of 3.3V leakage from GPIO pins during power-down

Part Number: TMS320C6745

Hi,

Several GPIO pins, including GP1[1], have internal pull-ups at 3.3V setting.
These GPIO pins immediately drop to 0V when the 3.3V power supply is turned off during power down, but after about 100ms, a pop voltage of several hundred mV is seen to follow the ramp down of the 3.3V power supply line.

Q1: Is this expected behavior?
Q2: Is this phenomenon a leak caused by the 3.3V power supply?

Best Regards,
UNA

  • Are the rest of the chip power supplies also being turned off?  This may be expected behavior, as the IO may be driven by internal circuits until the supply for those circuits is too low.  That is when the 3.3V IO supply takes over with the pull up, which is when you see the slight voltage on the pin as the 3.3V ramps down.

    Regards,

    James

  • Hi James,

    Thank you for your reply.

    All chip power is turned off according to the power down sequence procedure in the datasheet.
    I understood that C674x would see a ramp down of the 3.3V IO power to the IO pins when power-down sequence.

    Best Regards,
    UNA