AM6442: FreeRTOS - vectors section

Nir Geller

Part Number: AM6442

Hi there,

I'm working on a AM64x evaluation board TMDS64GPEVM, running FreeRTOS with mcu_plus_sdk_am64x_08_00_00_21.

This is a general question about .vectors section.

After powering up the board and connecting with XDS200 to R5_0_0 and R5_0_1 the memory at address 0x0 from the perspective of both core0 and core1 looks like this:

Using objdump on some .out file I can see the .vectors section:

Disassembly of section .vectors:

00000000 <_vectors>:
0: e59ff018 ldr pc, [pc, #24] ; 20 <reset_addr>
4: e59ff018 ldr pc, [pc, #24] ; 24 <undefined_addr>
8: e59ff018 ldr pc, [pc, #24] ; 28 <svc_addr>
c: e59ff018 ldr pc, [pc, #24] ; 2c <prefetch_abort_addr>
10: e59ff018 ldr pc, [pc, #24] ; 30 <data_abort_addr>
14: e59ff018 ldr pc, [pc, #24] ; 34 <reserved_addr>
18: e59ff018 ldr pc, [pc, #24] ; 38 <irq_addr>
1c: e59ff018 ldr pc, [pc, #24] ; 3c <fiq_addr>

00000020 <reset_addr>:
20: 70023fd4 ldrdvc r3, [r2], -r4

00000024 <undefined_addr>:
24: 70020727 andvc r0, r2, r7, lsr #14

00000028 <svc_addr>:
28: 70020b70 andvc r0, r2, r0, ror fp

0000002c <prefetch_abort_addr>:
2c: 70020745 andvc r0, r2, r5, asr #14

00000030 <data_abort_addr>:
30: 70020763 andvc r0, r2, r3, ror #14

00000034 <reserved_addr>:
34: 70020709 andvc r0, r2, r9, lsl #14

00000038 <irq_addr>:
38: 70020bf8 strdvc r0, [r2], -r8

0000003c <fiq_addr>:
3c: 70020651 andvc r0, r2, r1, asr r6

When connecting to core0 and loading an image I can see the vectors section properly loaded in address 0x0.

When connecting to core1 and examining the memory it looks like the image is properly loaded. I can see initialized variables and structures.
However, from core1 perspective the vector doesn't seem to be loaded.

How come it not visible from core1?

What is responsible for initializing this particular piece of memory? where is this code?

In the am64x TRM, Main domain memory map says that in address 0x0
PSRAMECC0_RAM 0x000000000 0x0000003FF 1 KB

Is this core specific area? not much is said about PSRAMECC0_RAM.

Please elaborate.

Thanks a lot,

Nir.

over 3 years ago

0 Nir Geller over 3 years ago

Expert 1140 points

Hi,

Any comment with regard to this issue would be great.

Thanks,

Nir.

0 Frank Livingston over 3 years ago in reply to Nir Geller

TI__Mastermind 29638 points

Hi Nir,

Sorry for the delay, I'm looking at this issue starting today. I'll get back with you shortly.

Regards,
Frank

+1 Frank Livingston over 3 years ago in reply to Nir Geller

TI__Mastermind 29638 points

Hi Nir,

The first 32 KB in the R5F memory map is ATCM (Tightly Coupled Memory). Please see the TRM, Table 2-3. R5FSS0/1 Memory Map. This memory is local to each R5F core.

I'm unable to reproduce this issue using MCU+SDK 08_00_00_21.

I checked whether I could reproduce the issue using the FreeRTOS "empty" example project for R5F0_0 and R5F0_1: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_00_00_21/exports/docs/api_guide_am64x/EXAMPLES_EMPTY.html

I have my AM64x GP EVM flashed with SBL NULL:

I have my CCS target configuration updated to use "CPU_reset.gel" for R5F0_0.

I observe the same memory contents starting at 0x0 that you see after connecting to R5F0_0 and R5F0_1.

I observe the vector table is correctly loaded for:

R5F0_0 after loading empty_am64x-evm_r5fss0-0_freertos_ti-arm-clang
R5F0_1 after loading empty_am64x-evm_r5fss0-1_freertos_ti-arm-clang

This is what I see after loading R5F0_1:

I also see ATCM is enabled on R5F0_0 and R5F1_0 by SBL NULL. This can be observe in CCS as follows:

View->Registers
Expand System_Registers
Browse down to CP15_TCM_ATCM_REGION

I see 0x00000019 in the register for both cores, which indicates ATCM is enabled. For the format of this register, see the R5F TRM, c9, ATCM Region Register.

The vector table is part of the FreeRTOS kernel code. If you inspect your .map file, you should see something like this:

output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.vectors   0    00000000    00000040     
                  00000000    00000040     freertos.am64x.r5f.ti-arm-clang.debug.lib : HwiP_armv7r_vectors_freertos_asm.obj (.vectors)

The source code for the vector table can be found in <SDK>/source/kernel/freertos/dpl/r5/HwiP_armv7r_vectors_freertos_asm.S.

The SBL enables ATCM (via Sciclient calls to SYSFW) and loads the vectors into ATCM. The source code for SBL NULL can be located in:

<SDK>/examples/drivers/boot/sbl_null/am64x-evm/r5fss0-0_nortos
<SDK>/source/drivers/bootloader

How are you initializing your EVM?

Regards,
Frank

0 Nir Geller over 3 years ago in reply to Frank Livingston

Expert 1140 points

Hi Frank,

Thanks a lot for your thorough reply.

Maybe I didn't describe my problem accurately enough.

After loading the image to core0 ONLY, I was examining the memory from core1 perspective WITHOUT loading the image, and realized that the interrupt vector is missing.

According to your explanation it is completely obvious why, TCM being core specific memory.

Thanks a lot,

Nir.

0 Frank Livingston over 3 years ago in reply to Nir Geller

TI__Mastermind 29638 points

Hi Nir,

Nir Geller said:
After loading the image to core0 ONLY, I was examining the memory from core1 perspective WITHOUT loading the image, and realized that the interrupt vector is missing.

I didn't understand that point. Thanks for the feedback.

Regards,
Frank

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AM6442: FreeRTOS - vectors section