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C6000-CGT: Filtering Interrupts w/ Different Optimization Levels

Part Number: C6000-CGT

Hi Team,

My customer has a question regarding a piece of code they are trying to implement. 

In the code below, they are trying to prevent INT7 from being invoked.

IER &= ~(1 << 7);
IER |= (1 << 7);

However, when they compiled it with optimization level 2 and ran it, they realized that this still generated INT7.

They believe the optimization is allowing the interrupt to occur and changed it to below.

void disable_int7(void)
{
    IER &= ~(1 << 7);
}

void enable_int7(void)
{
    IER |= (1 << 7);
}

disable_int7();
enable_int7();

Would this prevent INT7?

Best regards,

Mari Tsunoda

  • Please be sure you #include <c6x.h> .  The rest of the post assumes your code does that.

    I'm confused.  To disable INT7, you use the code ...

    IER &= ~(1 << 7);

    There may be a delay of a few cycles before it takes effect.  Why does your code then ...

    IER |= (1 << 7);

    This enables INT7.  Once it takes effect, INT7 can be raised.

    Thanks and regards,

    -George

  • Hi George,

    Sorry for the confusion. My understanding was incorrect, so I relayed the wrong information. Apologies.

    So the following is the code before,

    IER &= ~(1 << 7);
    /* Some code they don't want to have interrupted */
    IER |= (1 << 7);
    

    and the following is the code after they changed it.

    void disable_int7(void)
    {
        IER &= ~(1 << 7);
    }
    
    void enable_int7(void)
    {
        IER |= (1 << 7);
    }
    
    disable_int7();
    /* Some code they don't want to have interrupted */
    enable_int7();

    When they compiled the before code at optimization level 2, they realized that the code had been reordered by the compiler so that it would allow INT7 during the section of code they didn't want interrupted.

    They are asking if the after code resolves the issue where their code isn't reordered by the compiler within the section of code.

    Also, are there any alternative ways of working around the reordering issue?

    Hope this can help clarify and thanks for your patience.

    Best regards,

    Mari Tsunoda

  • Are they willing to disable all interrupts, and not just INT7?  If so, please use the intrinsics _disable_interrupts and _restore_interrupts.  For the details, please search the C6000 compiler manual for the sub-chapter titled Using Intrinsics for Interrupt Control and Atomic Sections.

    Please let me know if this suggestion resolves the problem.

    Thanks and regards,

    -George

  • Hi George,

    Thank you for your response. I will definitely ask them about disabling all interrupts. But in the situation that they cannot, will the 'after' code work?

    Best regards,

    Mari Tsunoda

  • will the 'after' code work?

    Using function calls works only if you are able to guarantee those functions do not get inlined.  

    Before making further suggestions, I want to know whether disabling all interrupts resolves the problem.

    Thanks and regards,

    -George

  • Hi George,

    They cannot disable all interrupts. What are the alternatives for blocking just INT7 for example?

    Best regards,

    Mari

  • One solution is to use #pragma FUNC_CANNOT_INLINE to insure these calls are not inlined ...

    #pragma FUNC_CANNOT_INLINE(disable_int7)
    void disable_int7(void)
    {
        IER &= ~(1 << 7);
    }
    
    #pragma FUNC_CANNOT_INLINE(enable_int7)
    void enable_int7(void)
    {
        IER |= (1 << 7);
    }

    There might be a better solution that uses fewer cycles and space.  I'll get back to you on that.

    Thanks and regards,

    -George

  • Hi George,

    Thank you! I will let my customer know that they can use FUNC_CANNOT_INLINE. Please keep me updated if there is a better solution!

    Best regards,

    Mari

  • Please keep me updated if there is a better solution!

    It turns out the solution in my last post is the best one we can find.

    Thanks and regards,

    -George