Hi,
I would like to exclude damping resistors in the circuit configuration between the C6748 and DDR memory.
Therefore, I am conducting a measurement of the DDR clock waveform change when the value of SDCR.DDRDRIVE0 is changed.
However, there was no particular difference in the observed waveforms when this register value was changed.
Is this expected behavior? Or do you have any idea what factors might cause the DDR clock waveform not to change?
Best Regards,
UNA
