AM5706: GPMC Interface with a Non-Memory Interface (Internal SRAM Available)

Athuljith R

Part Number: AM5706

Hi, I am planning on Interfacing AM5706 with a MIL1553 controller chip, HI-6200 series from Holt, which will support a parallel interface in Intel and Motorola Style support. This IC have an internal SRAM too. Is there any issue could occur, since it is not primarily an memory device. My architecture block diagram is committed here. Please help me here.

Regards

Athuljith R

over 1 year ago

0 Shiou Mei Huang over 1 year ago

TI__Genius 10180 points

Athuljith,

We do support ASIC access with the GPMC, so if the MIL1553 can meet the GPMC timings and access modes specified in the DM/TRM, I don't suspect any issues. There are a few E2E threads regarding this access mode already, I would recommend doing a search to understand this topic better.

This thread may be helpful (note part number differences): https://e2e.ti.com/support/processors-group/processors/f/processors-forum/710067/am5726-gpmc-connection-to-asic

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AM5706: GPMC Interface with a Non-Memory Interface (Internal SRAM Available)