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Original question:

TMS320C6657: PCIe Memory read/write process

TMS320C6657: PCIE read-write process

Alson Richards
Prodigy 60 points
Part Number: TMS320C6657

Thanks to all who responded earlier, we have advanced in our understanding.

Just to be clear, after configuring the PCIe, simply writing or reading the the appropriate address in the DSP memory space will trigger the PCIe address translation mechanism, correct? This seems to be what is happening in the PCIe sample project (PCIE_evmc6657_wSoCFile_C66BiosExampleProject). 

Also, using DMA as the mechanism works as well? I see what looks like an edma transfer test in that code as well.

Thanks for patiently answering my questions, we are just getting ramped up on this technology.

Alson Richards

  • 0
    TI__Expert 4314 points

    Hi Alson,

    Shall I unlock the previous query and post my response on the Old query or Shall I continue with this thread?

    Alson Richards said:
    after configuring the PCIe, simply writing or reading the the appropriate address in the DSP memory space will trigger the PCIe address translation mechanism

    In general, APIs abstract the Direct Memory Access and your observation is correct.

    Alson Richards said:

    Also, using DMA as the mechanism works as well? I see what looks like an edma transfer test in that code as well.

    Yes, Indeed. The EDMA example API documentation for Driver and CSL can be found in SDK

    Driver API : {TI RTOS SDK INSTALLATION FOLDER}\edma3_lld_2_12_05_30E\packages\ti\sdo\edma3\drv\docs\html\INDEX.HTML

    CSL API   :  {TI RTOS SDK INSTALLATION FOLDER}\pdk_c667x_2_0_16\packages\ti\csl\docs\doxygen\html\index.html

    Thanks,

    Rajarajan U

  • 0 in reply to Rajarajan Uthayakumar
    Prodigy 60 points

    Thanks for the quick response Rajarajan, your answer and links are very helpful.