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TDA4VM: it seems setting the wrong registers GPIOMUX_INTRTR0_MUXCNTL_n

Part Number: TDA4VM

Dear TI:

I added the following log printings before and after invocation of function `Sciclient_rmIrqSet()` in file pdk_jacinto_08_02_00_21/packages/ti/drv/gpio/soc/j721e/GPIO_soc.c. The codes are as follows:

         printf("___ %s:%d:\n"
                 "\trmIrqReq.hdr.type=%u\n"
                 "\trmIrqReq.hdr.host=%u\n"
                 "\trmIrqReq.hdr.seq=%u\n"
                 "\trmIrqReq.hdr.flags=%u\n"
                 "\trmIrqReq.valid_params=%u\n"
                 "\trmIrqReq.src_id=%u\n"
                 "\trmIrqReq.src_index=%u\n"
                 "\trmIrqReq.dst_id=%u\n"
                 "\trmIrqReq.dst_host_irq=%u\n"
                 "\trmIrqReq.ia_id=%u\n"
                 "\trmIrqReq.vint=%u\n"
                 "\trmIrqReq.global_event=%u\n"
                 "\trmIrqReq.vint_status_bit_index=%u\n"
                 "\trmIrqReq.secondary_host=%u\n",
                 __func__, __LINE__,
                 rmIrqReq.hdr.type,
                 rmIrqReq.hdr.host,
                 rmIrqReq.hdr.seq,
                 rmIrqReq.hdr.flags,
                 rmIrqReq.valid_params,
                 rmIrqReq.src_id,
                 rmIrqReq.src_index,
                 rmIrqReq.dst_id,
                 rmIrqReq.dst_host_irq,
                 rmIrqReq.ia_id,
                 rmIrqReq.vint,
                 rmIrqReq.global_event,
                 rmIrqReq.vint_status_bit_index,
                 rmIrqReq.secondary_host);

         printf("___ before 0xa00064=0x%08x\n", *((uint32_t *)0x00a00060));
         printf("___ before 0xa00064=0x%08x\n", *((uint32_t *)0x00a00064));
         printf("___ before 0xa00068=0x%08x\n", *((uint32_t *)0x00a00068));
         printf("___ before 0xa0006c=0x%08x\n", *((uint32_t *)0x00a0006c));
         printf("___ before 0xa00070=0x%08x\n", *((uint32_t *)0x00a00070));

         retVal = Sciclient_rmIrqSet(
                    (const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
                     &rmIrqResp,
                     SCICLIENT_SERVICE_WAIT_FOREVER);

         printf("___ after 0xa00064=0x%08x\n", *((uint32_t *)0x00a00060));
         printf("___ after 0xa00064=0x%08x\n", *((uint32_t *)0x00a00064));
         printf("___ after 0xa00068=0x%08x\n", *((uint32_t *)0x00a00068));
         printf("___ after 0xa0006c=0x%08x\n", *((uint32_t *)0x00a0006c));
         printf("___ after 0xa00070=0x%08x\n", *((uint32_t *)0x00a00070));

By runing the above codes on MCU2_0, I got the following logs:

[MCU2_0]     30.389959 s: ___ GPIO_socConfigIntrPath:826:
[MCU2_0]     30.390021 s:       rmIrqReq.hdr.type=0
[MCU2_0]     30.390059 s:       rmIrqReq.hdr.host=0
[MCU2_0]     30.390093 s:       rmIrqReq.hdr.seq=0
[MCU2_0]     30.390125 s:       rmIrqReq.hdr.flags=0
[MCU2_0]     30.390159 s:       rmIrqReq.valid_params=3
[MCU2_0]     30.390193 s:       rmIrqReq.src_id=105
[MCU2_0]     30.390225 s:       rmIrqReq.src_index=7
[MCU2_0]     30.390258 s:       rmIrqReq.dst_id=245
[MCU2_0]     30.390292 s:       rmIrqReq.dst_host_irq=184
[MCU2_0]     30.390328 s:       rmIrqReq.ia_id=0
[MCU2_0]     30.390360 s:       rmIrqReq.vint=0
[MCU2_0]     30.390394 s:       rmIrqReq.global_event=0
[MCU2_0]     30.390430 s:       rmIrqReq.vint_status_bit_index=0
[MCU2_0]     30.390467 s:       rmIrqReq.secondary_host=255
[MCU2_0]     30.390507 s: ___ before 0xa00064=0x00000000
[MCU2_0]     30.390545 s: ___ before 0xa00064=0x00000000
[MCU2_0]     30.390582 s: ___ before 0xa00068=0x00000000
[MCU2_0]     30.390619 s: ___ before 0xa0006c=0x00000000
[MCU2_0]     30.390656 s: ___ before 0xa00070=0x00000000
[MCU2_0]     30.391078 s: ___ after 0xa00064=0x00000000
[MCU2_0]     30.391131 s: ___ after 0xa00064=0x00010107
[MCU2_0]     30.391171 s: ___ after 0xa00068=0x00000000
[MCU2_0]     30.391209 s: ___ after 0xa0006c=0x00000000
[MCU2_0]     30.391246 s: ___ after 0xa00070=0x00000000
[MCU2_0]     30.391337 s: ___ GPIO_socConfigIntrPath:826:
[MCU2_0]     30.391382 s:       rmIrqReq.hdr.type=0
[MCU2_0]     30.391418 s:       rmIrqReq.hdr.host=0
[MCU2_0]     30.391452 s:       rmIrqReq.hdr.seq=0
[MCU2_0]     30.391485 s:       rmIrqReq.hdr.flags=0
[MCU2_0]     30.391520 s:       rmIrqReq.valid_params=3
[MCU2_0]     30.391554 s:       rmIrqReq.src_id=106
[MCU2_0]     30.391588 s:       rmIrqReq.src_index=0
[MCU2_0]     30.391621 s:       rmIrqReq.dst_id=245
[MCU2_0]     30.391656 s:       rmIrqReq.dst_host_irq=185
[MCU2_0]     30.391744 s:       rmIrqReq.ia_id=0
[MCU2_0]     30.391786 s:       rmIrqReq.vint=0
[MCU2_0]     30.391820 s:       rmIrqReq.global_event=0
[MCU2_0]     30.391858 s:       rmIrqReq.vint_status_bit_index=0
[MCU2_0]     30.391896 s:       rmIrqReq.secondary_host=255
[MCU2_0]     30.391934 s: ___ before 0xa00064=0x00000000
[MCU2_0]     30.391973 s: ___ before 0xa00064=0x00010107
[MCU2_0]     30.392010 s: ___ before 0xa00068=0x00000000
[MCU2_0]     30.392047 s: ___ before 0xa0006c=0x00000000
[MCU2_0]     30.392084 s: ___ before 0xa00070=0x00000000
[MCU2_0]     30.392440 s: ___ after 0xa00064=0x00000000
[MCU2_0]     30.392498 s: ___ after 0xa00064=0x00010107
[MCU2_0]     30.392565 s: ___ after 0xa00068=0x00010120
[MCU2_0]     30.392607 s: ___ after 0xa0006c=0x00000000
[MCU2_0]     30.392647 s: ___ after 0xa00070=0x00000000

From the above logs, there is `30.390292 s:       rmIrqReq.dst_host_irq=184`. According to `Table 9-186. R5FSS0_CORE0 Interrupt Map` from SPRUIL1B-TRM.pdf, the corresponding Interrupt Name is `GPIOMUX_INTRTR0_OUTP_24`, so the corresponding interrupt register is `GPIOMUX_INTRTR0_MUXCNTL_24`. According to section `9.3.3.2.2 GPIOMUX_INTRTR0_MUXCNTL_n Register` from SPRUIL1B-TRM.pdf, the register address is `0x00A00004+0x4+(24*0x4)=0x00a00068`, but `0x00a00064` is changed after invocation of `Sciclient_rmIrqSet()` according to `30.391131 s: ___ after 0xa00064=0x00010107` in the above logs. From my unstanding the register `0x00a00068` should be changed.

  • Hi Quing,

    Can you please share the following details:
    1) Which SDK version are you using?
    2) Which example are you running from the SDK?
    3) For which core you are running this test?

    Regards,
    Parth

  • Hi Parth Nagpal,

    1) I'm using rtos_sdk8.2, the package filename is "ti-processor-sdk-rtos-j721e-evm-08_02_00_05.tar.gz".
    2) I wrote my test codes by referencing "ti/drv/gpio/test/led_blink".
    3) I'm runing the test on MCU2_0.

    I simpled my test codes. Now my test codes are as the following patch:

    diff --git a/PSDKRA/pdk_jacinto_08_02_00_21/packages/ti/drv/gpio/soc/j721e/GPIO_soc.c b/PSDKRA/pdk_jacinto_08_02_00_21/packages/ti/drv/gpio/soc/j721e/GPIO_soc.c
    index d2015e58d..f75657135 100755
    --- a/PSDKRA/pdk_jacinto_08_02_00_21/packages/ti/drv/gpio/soc/j721e/GPIO_soc.c
    +++ b/PSDKRA/pdk_jacinto_08_02_00_21/packages/ti/drv/gpio/soc/j721e/GPIO_soc.c
    @@ -40,6 +40,7 @@
      *
      */
     
    +#include <stdio.h>  // ___
     #include <string.h>
     #include <ti/csl/csl_utils.h>
     #include <ti/csl/soc/j721e/src/cslr_soc.h>
    @@ -807,11 +808,54 @@ int32_t GPIO_socConfigIntrPath(uint32_t portNum, uint32_t pinNum,void *hwAttrs,b
         /* Config event */
         if(setIntrPath) {
            if(GPIO_PinBankUsageCount[portNum][bankNum] == 0U) {
    +         printf("___ %s:%d:\n"
    +                 "\trmIrqReq.hdr.type=%u\n"
    +                 "\trmIrqReq.hdr.host=%u\n"
    +                 "\trmIrqReq.hdr.seq=%u\n"
    +                 "\trmIrqReq.hdr.flags=%u\n"
    +                 "\trmIrqReq.valid_params=%u\n"
    +                 "\trmIrqReq.src_id=%u\n"
    +                 "\trmIrqReq.src_index=%u\n"
    +                 "\trmIrqReq.dst_id=%u\n"
    +                 "\trmIrqReq.dst_host_irq=%u\n"
    +                 "\trmIrqReq.ia_id=%u\n"
    +                 "\trmIrqReq.vint=%u\n"
    +                 "\trmIrqReq.global_event=%u\n"
    +                 "\trmIrqReq.vint_status_bit_index=%u\n"
    +                 "\trmIrqReq.secondary_host=%u\n",
    +                 __func__, __LINE__,
    +                 rmIrqReq.hdr.type,
    +                 rmIrqReq.hdr.host,
    +                 rmIrqReq.hdr.seq,
    +                 rmIrqReq.hdr.flags,
    +                 rmIrqReq.valid_params,
    +                 rmIrqReq.src_id,
    +                 rmIrqReq.src_index,
    +                 rmIrqReq.dst_id,
    +                 rmIrqReq.dst_host_irq,
    +                 rmIrqReq.ia_id,
    +                 rmIrqReq.vint,
    +                 rmIrqReq.global_event,
    +                 rmIrqReq.vint_status_bit_index,
    +                 rmIrqReq.secondary_host);
    +
    +         printf("___ before 0xa00060=0x%08x\n", *((uint32_t *)0x00a00060));
    +         printf("___ before 0xa00064=0x%08x\n", *((uint32_t *)0x00a00064));
    +         printf("___ before 0xa00068=0x%08x\n", *((uint32_t *)0x00a00068));
    +         printf("___ before 0xa0006c=0x%08x\n", *((uint32_t *)0x00a0006c));
    +         printf("___ before 0xa00070=0x%08x\n", *((uint32_t *)0x00a00070));
    +
              retVal = Sciclient_rmIrqSet(
                         (const struct tisci_msg_rm_irq_set_req *)&rmIrqReq,
                          &rmIrqResp,
                          SCICLIENT_SERVICE_WAIT_FOREVER);
     
    +         printf("___ after 0xa00060=0x%08x\n", *((uint32_t *)0x00a00060));
    +         printf("___ after 0xa00064=0x%08x\n", *((uint32_t *)0x00a00064));
    +         printf("___ after 0xa00068=0x%08x\n", *((uint32_t *)0x00a00068));
    +         printf("___ after 0xa0006c=0x%08x\n", *((uint32_t *)0x00a0006c));
    +         printf("___ after 0xa00070=0x%08x\n", *((uint32_t *)0x00a00070));
    +
               if(retVal==CSL_PASS) {
                 /* Increase the bank usage count for this port */
     			GPIO_PinBankUsageCount[portNum][bankNum]++;
    diff --git a/PSDKRA/vision_apps/platform/j721e/rtos/common/app_init.c b/PSDKRA/vision_apps/platform/j721e/rtos/common/app_init.c
    index cf0be89f3..2e5d274c0 100755
    --- a/PSDKRA/vision_apps/platform/j721e/rtos/common/app_init.c
    +++ b/PSDKRA/vision_apps/platform/j721e/rtos/common/app_init.c
    @@ -172,6 +172,81 @@ void appLogDeviceWrite(char *string, uint32_t max_size)
     }
     #endif
     
    +#ifdef CPU_mcu2_0
    +#ifdef FREERTOS
    +
    +#include <ti/drv/gpio/GPIO.h>
    +#include <ti/drv/gpio/soc/GPIO_soc.h>
    +#include <ti/csl/soc.h>
    +
    +#ifndef GPIO_LED0_PORT_NUM
    +#define GPIO_LED0_PORT_NUM 1
    +#endif
    +#ifndef GPIO_LED1_PORT_NUM
    +#define GPIO_LED1_PORT_NUM 1
    +#endif
    +
    +#ifndef GPIO_LED0_PIN_NUM
    +#define GPIO_LED0_PIN_NUM 2
    +#endif
    +#ifndef GPIO_LED1_PIN_NUM
    +#define GPIO_LED1_PIN_NUM 18
    +#endif
    +
    +/* GPIO Driver board specific pin configuration structure */
    +GPIO_PinConfig gpioPinConfigs[] =
    +{
    +    /* Input pin with interrupt enabled */
    +    GPIO_DEVICE_CONFIG(GPIO_LED0_PORT_NUM, GPIO_LED0_PIN_NUM) |
    +    GPIO_CFG_IN_INT_RISING | GPIO_CFG_OUTPUT,
    +
    +    /* Output pin */
    +    GPIO_DEVICE_CONFIG(GPIO_LED1_PORT_NUM, GPIO_LED1_PIN_NUM) |
    +    GPIO_CFG_OUTPUT
    +};
    +
    +/* GPIO Driver call back functions */
    +GPIO_CallbackFxn gpioCallbackFunctions[] =
    +{
    +    NULL,
    +    NULL
    +};
    +
    +/* GPIO Driver configuration structure */
    +GPIO_v0_Config GPIO_v0_config =
    +{
    +    gpioPinConfigs,
    +    gpioCallbackFunctions,
    +    sizeof(gpioPinConfigs) / sizeof(GPIO_PinConfig),
    +    sizeof(gpioCallbackFunctions) / sizeof(GPIO_CallbackFxn),
    +#if (__ARM_ARCH == 7) && (__ARM_ARCH_PROFILE == 'R') /* R5F */
    +    0x8U
    +#else
    +#if defined(__C7100__)
    +    0x01U
    +#else
    +    0x20U
    +#endif
    +#endif
    +};
    +
    +static void Board_initGPIO(void)
    +{
    +    Board_initCfg boardCfg;
    +
    +    GPIO_v0_HwAttrs gpio_cfg;
    +
    +    GPIO_socGetInitCfg(GPIO_LED0_PORT_NUM, &gpio_cfg);
    +
    +    gpio_cfg.baseAddr = CSL_GPIO1_BASE;
    +	gpio_cfg.intCfg[GPIO_LED0_PIN_NUM].intNum = CSLR_R5FSS0_CORE0_INTR_GPIOMUX_INTRTR0_OUTP_24;
    +
    +    GPIO_socSetInitCfg(GPIO_LED0_PORT_NUM, &gpio_cfg);
    +}
    +
    +#endif
    +#endif
    +
     int32_t appInit()
     {
         int32_t status = 0;
    @@ -624,6 +699,10 @@ int32_t appInit()
         #ifdef CPU_mcu2_0
         #ifdef FREERTOS
         status = appIpcCreateTraceBufFlushTask();
    +    {
    +        Board_initGPIO();
    +        GPIO_init();
    +    }
         #endif
         #endif
     
    

    Now the logs are as follows:

    [MCU2_0]      4.684545 s: ___ GPIO_socConfigIntrPath:826:
    [MCU2_0]      4.684597 s:       rmIrqReq.hdr.type=0
    [MCU2_0]      4.684633 s:       rmIrqReq.hdr.host=0
    [MCU2_0]      4.684665 s:       rmIrqReq.hdr.seq=0
    [MCU2_0]      4.684699 s:       rmIrqReq.hdr.flags=0
    [MCU2_0]      4.684732 s:       rmIrqReq.valid_params=3
    [MCU2_0]      4.684766 s:       rmIrqReq.src_id=106
    [MCU2_0]      4.684799 s:       rmIrqReq.src_index=0
    [MCU2_0]      4.684832 s:       rmIrqReq.dst_id=245
    [MCU2_0]      4.684866 s:       rmIrqReq.dst_host_irq=184
    [MCU2_0]      4.684900 s:       rmIrqReq.ia_id=0
    [MCU2_0]      4.684932 s:       rmIrqReq.vint=0
    [MCU2_0]      4.684964 s:       rmIrqReq.global_event=0
    [MCU2_0]      4.684999 s:       rmIrqReq.vint_status_bit_index=0
    [MCU2_0]      4.685037 s:       rmIrqReq.secondary_host=255
    [MCU2_0]      4.685074 s: ___ before 0xa00060=0x00000000
    [MCU2_0]      4.685110 s: ___ before 0xa00064=0x00000000
    [MCU2_0]      4.685147 s: ___ before 0xa00068=0x00000000
    [MCU2_0]      4.685184 s: ___ before 0xa0006c=0x00000000
    [MCU2_0]      4.685221 s: ___ before 0xa00070=0x00000000
    [MCU2_0]      4.685698 s: ___ after 0xa00060=0x00000000
    [MCU2_0]      4.685754 s: ___ after 0xa00064=0x00010120
    [MCU2_0]      4.685797 s: ___ after 0xa00068=0x00000000
    [MCU2_0]      4.685834 s: ___ after 0xa0006c=0x00000000
    [MCU2_0]      4.685870 s: ___ after 0xa00070=0x00000000

    Still `0x00a00064` is changed but not `0x00a00068`.

  • Hi Parth Nagpal,

    Have you reproduced the issue?

  • Hi Parth Nagpal,

    Any further advices?

  • Hi Parth Nagpal,

    Is my understanding correct about the register value changing?
    How about this issue now?

  • Hi Qing,

    From the above logs, there is `30.390292 s:       rmIrqReq.dst_host_irq=184`. According to `Table 9-186. R5FSS0_CORE0 Interrupt Map` from SPRUIL1B-TRM.pdf, the corresponding Interrupt Name is `GPIOMUX_INTRTR0_OUTP_24`, so the corresponding interrupt register is `GPIOMUX_INTRTR0_MUXCNTL_24`. According to section `9.3.3.2.2 GPIOMUX_INTRTR0_MUXCNTL_n Register` from SPRUIL1B-TRM.pdf, the register address is `0x00A00004+0x4+(24*0x4)=0x00a00068`, but `0x00a00064` is changed after invocation of `Sciclient_rmIrqSet()` according to `30.391131 s: ___ after 0xa00064=0x00010107` in the above logs. From my unstanding the register `0x00a00068` should be changed.

    This does not seems to be the correct interpretation here.

    According to your logs, srcID - 105 (GPIO0) and DestID (245) Main R50. But there is no direct route from GPIO0 to Main R50. It has to go through GPIOMUX interrupt router which is not happening in your case. Can you try the running the GPIO LED example without any modification and see if the logs are as expected?

    Regards,
    Parth

  • Hi Parth,

    But there is no direct route from GPIO0 to Main R50. It has to go through GPIOMUX interrupt router which is not happening in your case.

    Yes, I think so. That's why I'm paying attention to GPIOMUX_INTRTR0.
    If interrupt source GPIOMUX_INTRTR0_OUTP_24 is used, in you opinion, could you tell which registers should be involved when routing GPIO0 to Main R50(MCU2_0)?

    Can you try the running the GPIO LED example without any modification and see if the logs are as expected?

    I tried but now I'm still failing to run this example on the vendor board I got.

    Regards,
    Qing

  • Hi Qing,

    If interrupt source GPIOMUX_INTRTR0_OUTP_24 is used, in you opinion, could you tell which registers should be involved when routing GPIO0 to Main R50(MCU2_0)?

    In this case GPIOMUX_INTRTR0_MUXCNTL_24 should be used.

    I tried but now I'm still failing to run this example on the vendor board I got.

    What issues are you facing with this example? Also, is this working fine on TI-EVM?

    Regards,
    Parth