I am porting a design with the AM3354 and 2x DDR3 modules to a new layout. They are arranged in a balanced T configuration. I am using the AM335x EMIF tools spread sheet to calculate the new DLL offsets for the read/write DQS, FIFO WE, and write data. The design is functional with these values. I would like to validate and optimize these values using the software leveling algorithm. This algorithm is not documented anywhere that I can find and appears to be only executable compiled files via code composer. This is not an option for me with the platform's configuration. Is there source code, a pseudo code description of the algorithm, or anything that I could use to implement it myself? Simply setting the REG_RDWRLVLFULL_START bit in the "Read-Write Leveling Control Register" (offset 0xDC) does not appear to execute the leveling. Maybe I'm missing something obvious. Thanks.