In one of our variant (platform based on AM64xx) we need to have up to 6 SPI slaves per MCSPI channel. Is there any hardware limitation for MCSPI to use 6 slaves per channel? I have seen 4 CS per MCSPI. Does that mean a single MCSPI can support up to 4 slave channels?
Also we need to use GPIOs as CS as many of the CS are multiplexed for some other functions. Is there any limitations to use GPIOs instead of defined CS pins?