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TDA4VM: SPI FIFO usage question

Part Number: TDA4VM

Hi TI Expert.

In "Technical Reference Manual_SPRUIL1B.pdf",following picture said " This buffer can be used by only one channel at a time"

Question:Is that mean: if " MCU_MCSPI0" is working in FIFO mode, " MCU_MCSPI1" can not be started on FIFO mode?

It also said " If several channels are selected and several FIFO enable bit fields are set to 1, the controller forces the buffer not to be used; the driver must set only one FIFO enable bit field.“

Queston:what is the meaning of "the controller forces the buffer not to be used;"?Can you explain this for me in detail?